| 2012 | ||
|---|---|---|
| c4 | Dan Li, Gabriele Minoia, Matteo Repossi, Daniele Baldi, Enrico Temporiti, Andrea Mazzanti, Francesco Svelto: A 25Gb/s low noise 65nm CMOS receiver tailored to 100GBASE-LR4. ESSCIRC 2012: 221-224 | |
| 2011 | ||
| j3 | Federico Vecchi, Stefano Bozzola, Enrico Temporiti, Davide Guermandi, Massimo Pozzoni, Matteo Repossi, Marco Cusmai, Ugo Decanis, Andrea Mazzanti, Francesco Svelto: A Wideband Receiver for Multi-Gbit/s Communications in 65 nm CMOS. J. Solid-State Circuits 46(3): 551-561 (2011) | |
| 2010 | ||
| j2 | Enrico Temporiti, Colin Weltin-Wu, Daniele Baldi, Marco Cusmai, Francesco Svelto: A 3.5 GHz Wideband ADPLL With Fractional Spur Suppression Through TDC Dithering and Feedforward Compensation. J. Solid-State Circuits 45(12): 2723-2736 (2010) | |
| j1 | Colin Weltin-Wu, Enrico Temporiti, Marco Cusmai, Daniele Baldi, Francesco Svelto: Insights Into Wideband Fractional ADPLLs: Modeling and Calibration of Nonlinearity Induced Fractional Spurs. IEEE Trans. on Circuits and Systems 57-I(9): 2259-2268 (2010) | |
| c3 | Federico Vecchi, Stefano Bozzola, Massimo Pozzoni, Davide Guermandi, Enrico Temporiti, Matteo Repossi, Ugo Decanis, Andrea Mazzanti, Francesco Svelto: A wideband mm-Wave CMOS receiver for Gb/s communications employing interstage coupled resonators. ISSCC 2010: 220-221 | |
| c2 | Colin Weltin-Wu, Enrico Temporiti, Daniele Baldi, Marco Cusmai, Francesco Svelto: A 3.5GHz wideband ADPLL with fractional spur suppression through TDC dithering and feedforward compensation. ISSCC 2010: 468-469 | |
| 2009 | ||
| c1 | Enrico Temporiti, Colin Weltin-Wu, Daniele Baldi, Riccardo Tonietto, Francesco Svelto: Insights into wideband fractional All-Digital PLLs for RF applications. CICC 2009: 37-44 | |
Data released under the ODC-BY 1.0 license — See also our legal information page