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 | 2013 | |
|---|---|---|
| j3 |      | Timothy N. Miller, Nagarjuna Surapaneni, Radu Teodorescu: Runtime failure rate targeting for energy-efficient reliability in chip microprocessors. Concurrency and Computation: Practice and Experience 25(6): 790-807 (2013) |
| 2012 | ||
| j2 | | Timothy N. Miller, Renji Thomas, Radu Teodorescu: Mitigating the Effects of Process Variation in Ultra-low Voltage Chip Multiprocessors using Dual Supply Voltages and Half-Speed Units. Computer Architecture Letters 11(2): 45-48 (2012) |
| c12 | | Timothy N. Miller, Xiang Pan, Renji Thomas, Naser Sedaghati, Radu Teodorescu: Booster: Reactive core acceleration for mitigating the effects of process variation and application imbalance in low-voltage chips. HPCA 2012: 27-38 |
| c11 | | Timothy N. Miller, Renji Thomas, Xiang Pan, Radu Teodorescu: VRSync: Characterizing and eliminating synchronization-induced voltage emergencies in many-core processors. ISCA 2012: 249-260 |
| 2011 | ||
| c10 | | Naser Sedaghati, Renji Thomas, Louis-Noël Pouchet, Radu Teodorescu, P. Sadayappan: StVEC: A Vector Instruction Extension for High Performance Stencil Computation. PACT 2011: 276-287 |
| 2010 | ||
| c9 | | Timothy N. Miller, Renji Thomas, James Dinan, Bruce M. Adcock, Radu Teodorescu: Parichute: Generalized Turbocode-Based Error Correction for Near-Threshold Caches. MICRO 2010: 351-362 |
| c8 | | Timothy N. Miller, Nagarjuna Surapaneni, Radu Teodorescu: Flexible Error Protection for Energy Efficient Reliable Architectures. SBAC-PAD 2010: 1-8 |
| 2008 | ||
| c7 | | Radu Teodorescu, Josep Torrellas: Variation-Aware Application Scheduling and Power Management for Chip Multiprocessors. ISCA 2008: 363-374 |
| 2007 | ||
| c6 | | Pin Zhou, Radu Teodorescu, Yuanyuan Zhou: HARD: Hardware-Assisted Lockset-based Race Detection. HPCA 2007: 121-132 |
| c5 | | Radu Teodorescu, Jun Nakano, Abhishek Tiwari, Josep Torrellas: Mitigating Parameter Variation with Dynamic Fine-Grain Body Biasing. MICRO 2007: 27-42 |
| 2006 | ||
| j1 | | Radu Teodorescu, Jun Nakano, Josep Torrellas: SWICH: A Prototype for Efficient Cache-Level Checkpointing and Rollback. IEEE Micro 26(5): 28-40 (2006) |
| c4 | | Shimin Chen, Babak Falsafi, Phillip B. Gibbons, Michael Kozuch, Todd C. Mowry, Radu Teodorescu, Anastassia Ailamaki, Limor Fix, Gregory R. Ganger, Bin Lin, Steven W. Schlosser: Log-based architectures for general-purpose monitoring of deployed code. ASID 2006: 63-65 |
| 2005 | ||
| c3 | | Radu Teodorescu, Josep Torrellas: Prototyping Architectural Support for Program Rollback Using FPGAs. FCCM 2005: 23-32 |
| 2004 | ||
| c2 | | Lucian Popa, Irina Athanasiu, Costin Raiciu, Raju Pandey, Radu Teodorescu: Using code collection to support large applications on mobile devices. MOBICOM 2004: 16-29 |
| 2001 | ||
| c1 | | Radu Teodorescu, Raju Pandey: Using JIT Compilation and Configurable Runtime Systems for Efficient Deployment of Java Programs on Ubiquitous Devices. Ubicomp 2001: 76-95 |
Colors in the list of coauthors
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