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Bart D. Theelen
2010 – today
- 2012
[c19]Bart D. Theelen, Joost-Pieter Katoen, Hao Wu: Model checking of Scenario-Aware Dataflow with CADP. DATE 2012: 653-658- 2011
- [c18]Jeroen Voeten, T. Hendriks, Bart D. Theelen, J. Schuddemat, W. Tabingh Suermondt, J. Gemei, K. Kotterink, C. van Huët: Predicting Timing Performance of Advanced Mechatronics Control Systems. COMPSAC Workshops 2011: 206-210
- [c17]Bart D. Theelen, Marc Geilen, Jeroen Voeten: Performance Model Checking Scenario-Aware Dataflow. FORMATS 2011: 43-59
- [c16]Sander Stuijk, Marc Geilen, Bart D. Theelen, Twan Basten: Scenario-aware dataflow: Modeling, analysis and implementation of dynamic applications. ICSAMOS 2011: 404-411
- 2010
- [c15]Jiansheng Xing, Bart D. Theelen, Rom Langerak, Jaco van de Pol, Jan Tretmans, Jeroen Voeten: From POOSL to UPPAAL: Transformation and Quantitative Analysis. ACSD 2010: 47-56
- [c14]Ahsan Shabbir, Sander Stuijk, Akash Kumar, Bart D. Theelen, Bart Mesman, Henk Corporaal: A predictable communication assist. Conf. Computing Frontiers 2010: 97-98
- [c13]Jiansheng Xing, Bart D. Theelen, Rom Langerak, Jaco van de Pol, Jan Tretmans, Jeroen Voeten: UPPAAL in Practice: Quantitative Verification of a RapidIO Network. ISoLA (2) 2010: 160-174
2000 – 2009
- 2009
- [j6]Oana Florescu, Jeroen Voeten, Bart D. Theelen, Henk Corporaal: Patterns for Automatic Generation of Soft Real-time System Models. Simulation 85(11-12): 709-734 (2009)
- 2008
- [j5]Akash Kumar, Bart Mesman, Bart D. Theelen, Henk Corporaal, Yajun Ha: Analyzing composability of applications on MPSoC platforms. Journal of Systems Architecture - Embedded Systems Design 54(3-4): 369-383 (2008)
- [j4]Sander Stuijk, Twan Basten, Marc Geilen, Amir Hossein Ghamarian, Bart D. Theelen: Resource-efficient routing and scheduling of time-constrained streaming communication on networks-on-chip. Journal of Systems Architecture - Embedded Systems Design 54(3-4): 411-426 (2008)
- [c12]
- 2007
- [j3]Marc Geilen, Twan Basten, Bart D. Theelen, Ralph Otten: An Algebra of Pareto Points. Fundam. Inform. 78(1): 35-74 (2007)
- [c11]Akash Kumar, Bart Mesman, Henk Corporaal, Bart D. Theelen, Yajun Ha: A Probabilistic Approach to Model Resource Contention for Performance Estimation of Multi-featured Media Devices. DAC 2007: 726-731
- [c10]Amir Hossein Ghamarian, Sander Stuijk, Twan Basten, Marc Geilen, Bart D. Theelen: Latency Minimization for Synchronous Data Flow Graphs. DSD 2007: 189-196
- [c9]Bart D. Theelen, Oana Florescu, Marc Geilen, Jinfeng Huang, P. H. A. van der Putten, Jeroen Voeten: Software/Hardware Engineering with the Parallel Object-Oriented Specification Language. MEMOCODE 2007: 139-148
- [c8]Bart D. Theelen: A Performance Analysis Tool for Scenario-Aware Streaming Applications. QEST 2007: 269-270
- 2006
- [c7]Amir Hossein Ghamarian, Marc Geilen, Sander Stuijk, Twan Basten, Bart D. Theelen, Mohammad Reza Mousavi, A. J. M. Moonen, Marco Bekooij: Throughput Analysis of Synchronous Data Flow Graphs. ACSD 2006: 25-36
- [c6]Sander Stuijk, Twan Basten, Marc Geilen, Amir Hossein Ghamarian, Bart D. Theelen: Resource-Efficient Routing and Scheduling of Time-Constrained Network-on-Chip Communication. DSD 2006: 45-52
- [c5]Akash Kumar, Bart Mesman, Bart D. Theelen, Henk Corporaal, Yajun Ha: Resource Manager for Non-preemptive Heterogeneous Multiprocessor System-on-chip. ESTImedia 2006: 33-38
- [c4]Amir Hossein Ghamarian, Marc Geilen, Twan Basten, Bart D. Theelen, Mohammad Reza Mousavi, Sander Stuijk: Liveness and Boundedness of Synchronous Data Flow Graphs. FMCAD 2006: 68-75
- [c3]Bart D. Theelen, Marc Geilen, Twan Basten, Jeroen Voeten, Stefan Valentin Gheorghita, Sander Stuijk: A scenario-aware data flow model for combined long-run average and worst-case performance analysis. MEMOCODE 2006: 185-194
- 2005
- [c2]Marc Geilen, Twan Basten, Bart D. Theelen, Ralph Otten: An Algebra of Pareto Points. ACSD 2005: 88-97
- 2003
- [j2]Bart D. Theelen, Jeroen Voeten, R. D. J. Kramer: Performance modelling of a network processor using POOSL. Computer Networks 41(5): 667-684 (2003)
- [j1]Bart D. Theelen, A. C. Verschueren, V. V. Reyes Suárez, M. P. J. Stevens, A. Nuñez: A scalable single-chip multi-processor architecture with on-chip RTOS kernel. Journal of Systems Architecture 49(12-15): 619-639 (2003)
- 2002
- [c1]Bart D. Theelen, A. C. Verschueren: Architecture Design of a Scalable Single-Chip Multi-Processor. DSD 2002: 132-139
Coauthor Index
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last updated on 2012-12-02 20:40 CET by the dblp team