| 2012 | ||
|---|---|---|
| j1 | Timothy N. Miller, Renji Thomas, Radu Teodorescu: Mitigating the Effects of Process Variation in Ultra-low Voltage Chip Multiprocessors using Dual Supply Voltages and Half-Speed Units. Computer Architecture Letters 11(2): 45-48 (2012) | |
| c4 | Timothy N. Miller, Xiang Pan, Renji Thomas, Naser Sedaghati, Radu Teodorescu: Booster: Reactive core acceleration for mitigating the effects of process variation and application imbalance in low-voltage chips. HPCA 2012: 27-38 | |
| c3 | Timothy N. Miller, Renji Thomas, Xiang Pan, Radu Teodorescu: VRSync: Characterizing and eliminating synchronization-induced voltage emergencies in many-core processors. ISCA 2012: 249-260 | |
| 2011 | ||
| c2 | Naser Sedaghati, Renji Thomas, Louis-Noël Pouchet, Radu Teodorescu, P. Sadayappan: StVEC: A Vector Instruction Extension for High Performance Stencil Computation. PACT 2011: 276-287 | |
| 2010 | ||
| c1 | Timothy N. Miller, Renji Thomas, James Dinan, Bruce M. Adcock, Radu Teodorescu: Parichute: Generalized Turbocode-Based Error Correction for Near-Threshold Caches. MICRO 2010: 351-362 | |
| 1 | Bruce M. Adcock | |
| 2 | James Dinan | |
| 3 | Timothy N. Miller | |
| 4 | Xiang Pan | |
| 5 | Louis-Noël Pouchet | |
| 6 | P. Sadayappan (Ponnuswamy Sadayappan) | |
| 7 | Naser Sedaghati | |
| 8 | Radu Teodorescu |
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