Sandip Tiwari

Jaeyoon Kim, Paul Michael Solomon, Sandip Tiwari: Adaptive Circuit Design Using Independently Biased Back-Gated Double-Gate MOSFETS. IEEE Trans. on Circuits and Systems 59-I(4): 806-819 (2012)

Sandip Tiwari: Nanostructure devices for logic and memory and beyond. ESSDERC 2012: 28-35

Sang-Hyeon Lee, Moonkyung Kim, Byung-ki Cheong, Jooyeon Kim, Jo-Won Lee, Sandip Tiwari: A Single Element Phase Change Memory. IEICE Transactions 94-C(5): 676-680 (2011)

Sandip Tiwari: Nanoelectronics Device Technologies: CMOS, Beyond and the Mysterious Case of Ockham's Razor. VLSI Design 2007: 24-25

Christianto C. Liu, Ilya Ganusov, Martin Burtscher, Sandip Tiwari: Bridging the Processor-Memory Performance Gapwith 3D IC Technology. IEEE Design & Test of Computers 22(6): 556-564 (2005)

Uygar Avci, Sandip Tiwari: A novel compact circuit for 4-PAM energy-efficient high speed interconnect data transmission and reception. Microelectronics Journal 36(1): 67-75 (2005)

Christianto C. Liu, Jeng-Huei Chen, Rajit Manohar, Sandip Tiwari: Mapping system-on-chip designs from 2-D to 3-D ICs. ISCAS (3) 2005: 2939-2942

Arvind Kumar, Sandip Tiwari: Testing and Defect Tolerance: A Rent's Rule Based Analysis and Implications on Nanoelectronics. DFT 2004: 280-288

Arvind Kumar, Sandip Tiwari: A power-performance adaptive low voltage analog circuit design using independently controlled double gate CMOS technology. ISCAS (1) 2004: 197-200

Arvind Kumar, Sandip Tiwari: Defect tolerance for nanocomputer architecture. SLIP 2004: 89-96