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Shinji Tomita
2010 – today
- 2012
[c30]Ryota Henmi, Yusuke Nishimura, Hiroaki Suzuki, Shinji Fukuma, Shin-ichiro Mori, Akinori Yamaguchi, Shinji Tomita: Prototype Implementation of a GPU-based Interactive Coupled Fluid-Structure Simulation. SNPD 2012: 721-725- 2011
[j5]Jun Yao, Shinobu Miwa, Hajime Shimada, Shinji Tomita: A Fine-Grained Runtime Power/Performance Optimization Method for Processors with Adaptive Pipeline Depth. J. Comput. Sci. Technol. 26(2): 292-301 (2011)
2000 – 2009
- 2008
[j4]Jun Yao, Shinobu Miwa, Hajime Shimada, Shinji Tomita: A Dynamic Control Mechanism for Pipeline Stage Unification by Identifying Program Phases. IEICE Transactions 91-D(4): 1010-1022 (2008)
[c29]Shinobu Miwa, Hironori Ichibayashi, Hidetsugu Irie, Masahiro Goshima, Hironori Nakajo, Shinji Tomita: Low-Complexity Bypass Network Using Small RAM. CDES 2008: 153-159
[c28]Kesuke Hashimoto, Shin-ichiro Mori, Akinori Yamaguchi, Makoto Komatsubara, Shinji Tomita: Interactive Fluid Simulation and its Remote Steering Framework with Visual and Haptic Feedback. MSV 2008: 53-57
[c27]Megumi Nakao, Kotaro Minato, Naoto Kume, Shin-ichiro Mori, Shinji Tomita: Vertex-preserving Cutting of Elastic Objects. VR 2008: 277-278- 2007
[j3]Jun Yao, Shinobu Miwa, Hajime Shimada, Shinji Tomita: Optimal pipeline depth with pipeline stage unification adoption. SIGARCH Computer Architecture News 35(5): 3-9 (2007)- 2005
[c26]Jun Yao, Hajime Shimada, Yasuhiko Nakashima, Shin-ichiro Mori, Shinji Tomita: Program Phase Detection Based Dynamic Control Mechanisms for Pipeline Stage Unification Adoption. ISHPC 2005: 494-507- 2004
[c25]Shinji Tomita, Akira Namatame: Mechanism Design for Environmental Issues. JSAI Workshops 2004: 80-94
[c24]Alam Mujahid, Koh Kakusho, Michihiko Minoh, Yasuhiko Nakashima, Shin-ichiro Mori, Shinji Tomita: Simulating realistic force and shape of virtual cloth with adaptive meshes and its parallel implementation in OpenMP. Parallel and Distributed Computing and Networks 2004: 386-391
[c23]Motohiro Takayama, Yuki Shinomoto, Masahiro Goshima, Shin-ichiro Mori, Yasuhiko Nakashima, Shinji Tomita: Implementation of Cell-Projection Parallel Volume Rendering with Dynamic Load Balancing. PDPTA 2004: 373-382- 2003
[c22]Yoshiro Imai, Shinji Tomita: A Web-Based Education Tool for Collaborative Learning of Assembly Programming. ICWI 2003: 703-710
[c21]Shinji Tomita, Akira Namatame: Bilateral Tradings with and without Strategic Thinking. MABS 2003: 73-88- 2002
[c20]Yoshiro Imai, Shinji Tomita, Haruo Niimi, Hitoshi Inomo, Wataru Shiraki, Hiroshi Ishikawa: Development of an Education Tool for Computer System. ICCE 2002: 1309-1310- 2001
[c19]Masahiro Goshima, Kengo Nishino, Toshiaki Kitamura, Yasuhiko Nakashima, Shinji Tomita, Shin-ichiro Mori: A high-speed dynamic instruction scheduling scheme for superscalar processors. MICRO 2001: 225-236
1990 – 1999
- 1999
[j2]Atsushi Kubota, Shogo Tatsumi, Toshihiko Tanaka, Masahiro Goshima, Shin-ichiro Mori, Hiroshi Nakashima, Shinji Tomita: A Technique to Eliminate Redundant Inter-Processor Communication on Parallelizing Compiler TINPAR. International Journal of Parallel Programming 27(2): 97-109 (1999)
[e1]Constantine D. Polychronopoulos, Kazuki Joe, Akira Fukuda, Shinji Tomita (Eds.): High Performance Computing, Second International Symposium, ISHPC'99, Kyoto, Japan, May 26-28, 1999, Proceedings. Lecture Notes in Computer Science 1615, Springer 1999, ISBN 3-540-65969-2- 1998
[c18]Shin-ya Goto, Atsushi Kubota, Toshihiko Tanaka, Masahiro Goshima, Shin-ichiro Mori, Hiroshi Nakashima, Shinji Tomita: Optimized Code Generation for Heterogeneous Computing Environment using Parallelizing Compiler TINPAR. IEEE PACT 1998: 426-433- 1997
[c17]Kazuhiko Ohno, Masahiko Ikawa, Masahiro Goshima, Shin-ichiro Mori, Hiroshi Nakashima, Shinji Tomita: Efficient Goal Scheduling in Concurrent Logic Language using Type-Based Dependency Analysis. ASIAN 1997: 268-282
[c16]Kazuhiko Ohno, Masahiko Ikawa, Shin-ichiro Mori, Hiroshi Nakashima, Shinji Tomita, Masahiro Goshima: Improvement of message communication in concurrent logic language. PASCO 1997: 156-164
[c15]Atsushi Kubota, Shogo Tatsumi, Toshihiko Tanaka, Masahiro Goshima, Shin-ichiro Mori, Hiroshi Nakashima, Shinji Tomita: A Technique to Eliminate Redundant Inter-Processor Communication on Parallelizing Compiler TINPAR. ISHPC 1997: 195-204
[c14]Jim Torresen, Shin-ichiro Mori, Hiroshi Nakashima, Shinji Tomita, Olav Landsverk: Exploiting Parallel Computers to Reduce Neural Network Training Time of Real Applications. ISHPC 1997: 405-414- 1996
[c13]Hesham Keshk, Shin-ichiro Mori, Hiroshi Nakashima, Shinji Tomita: Amon2: A Parallel Wire Routing Algorithm on a Torus Network Parallel Computer. International Conference on Supercomputing 1996: 197-204- 1995
[c12]Hesham Keshk, Shin-ichiro Mori, Hiroshi Nakashima, Shinji Tomita: Amon: A Parallel Slice Algorithm for Wire Routing. International Conference on Supercomputing 1995: 200-208- 1993
[c11]Shin-ichiro Mori, Hideki Saito, Masahiro Goshima, Mamoru Yanagihara, Takashi Tanaka, David Fraser, Kazuki Joe, Hiroyuki Nitta, Shinji Tomita: A distributed shared memory multiprocessor ASURA: memory and cache architecture. SC 1993: 740-749- 1992
[c10]Tetsuo Hironaka, Takashi Hashimoto, Keizo Okazaki, Kazuaki Murakami, Shinji Tomita: Benchmarking a vector-processor prototype based on multithreaded streaming/FIFO vector (MSFV) architecture. ICS 1992: 272-281
1980 – 1989
- 1989
[c9]Kazuaki Murakami, Shin-ichiro Mori, Akira Fukuda, Toshinori Sueyoshi, Shinji Tomita: The Kyushu University reconfigurable parallel processor: design of memory and intercommunicaiton architectures. ICS 1989: 351-360
[c8]Kazuaki Murakami, Shin-ichiro Mori, Akira Fukuda, Toshinori Sueyoshi, Shinji Tomita: The Kyushu University Reconfigurable Parallel Processor - Design Philosophy and Architecture. IFIP Congress 1989: 995-1000
[c7]Kazuaki Murakami, Naohiko Irie, Morihiro Kuga, Shinji Tomita: SIMP (Single Instruction stream/Multiple Instruction Pipelining): A Novel High-Speed Single-Processor Architecture. ISCA 1989: 78-85- 1986
[c6]
[c5]Shinji Tomita, Kiyoshi Shibayama, Toshiyuki Nakata, Shinji Yuasa, Hiroshi Hagiwara: A Computer with Low-Level Parallelism QA-2: Its Applications to 3-D Graphics and Prolog/Lisp Machines. ISCA 1986: 280-289- 1983
[c4]Shinji Tomita, Kiyoshi Shibayama, Toshiaki Kitamura, Toshiyuki Nakata, Hiroshi Hagiwara: A User-Microprogrammable, Local Host Computer With Low-Level Parallelism. ISCA 1983: 151-157- 1980
[j1]Hiroshi Hagiwara, Shinji Tomita, Shigeru Oyanagi, Kiyoshi Shibayama: A Dynamically Microprogammable Computer with Low-Level Parallelism. IEEE Trans. Computers 29(7): 577-595 (1980)
[c3]Kiyoshi Shibayama, Shinji Tomita, Hiroshi Hagiwara, Katsuhiro Yamazaki, Toshiaki Kitamura: Performance Evaluation and Improvement of a Dynamically Microprogrammable Computer with Low-Level Parallelism. IFIP Congress 1980: 181-186
1970 – 1979
- 1977
[c2]Shinji Tomita, Kiyoshi Shibayama, Shigeru Oyanagi, Hiroshi Hagiwara: Hardware Organization of a Low Level Parallel Processor. IFIP Congress 1977: 855-860- 1971
[c1]Toshiyuki Sakai, Kenji Ohtani, Shinji Tomita: On-Line, Real-Time, Multiple-Speech Output System. IFIP Congress (1) 1971: 686-690
Coauthor Index
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last updated on 2013-02-01 19:56 CET by the dblp team



