| 2013 | ||
|---|---|---|
| c17 | Meng Yang, Jiarong Tong, A. E. A. Almaini: Indirect connection aware attraction for FPGA clustering (abstract only). FPGA 2013: 265 | |
| 2012 | ||
| c16 | Ying Wang, Jian Yan, Xuegong Zhou, Lingli Wang, Wayne Luk, Chenglian Peng, Jiarong Tong: A partially reconfigurable architecture supporting hardware threads. FPT 2012: 269-276 | |
| 2011 | ||
| j3 | Kanwen Wang, Jialin Chen, Wei Cao, Ying Wang, Lingli Wang, Jiarong Tong: A Reconfigurable Multi-Transform VLSI Architecture Supporting Video Codec Design. IEEE Trans. on Circuits and Systems 58-II(7): 432-436 (2011) | |
| c15 | Naifeng Jing, Ju-Yueh Lee, Chun Zhang, Jiarong Tong, Zhigang Mao, Lei He: Fault modeling and characteristics of SRAM-based FPGAs (abstract only). FPGA 2011: 279 | |
| 2010 | ||
| j2 | Chun Zhang, Yu Hu, Lingli Wang, Lei He, Jiarong Tong: Accelerating Boolean Matching Using Bloom Filter. IEICE Transactions 93-A(10): 1775-1781 (2010) | |
| c14 | Chun Zhang, Yu Hu, Lingli Wang, Lei He, Jiarong Tong: Building a faster boolean matcher using bloom filter. FPGA 2010: 185-188 | |
| c13 | Kejie Ma, Lingli Wang, Xuegong Zhou, Sheldon X.-D. Tan, Jiarong Tong: General switch box modeling and optimization for FPGA routing architectures. FPT 2010: 320-323 | |
| c12 | Chun Zhang, Yu Hu, Lingli Wang, Lei He, Jiarong Tong: Engineering a scalable Boolean matching based on EDA SaaS 2.0. ICCAD 2010: 750-755 | |
| 2009 | ||
| c11 | Fang Wu, Huowen Zhang, Lei Duan, Jinmei Lai, Yuan Wang, Jiarong Tong: A delay-optimized universal FPGA routing architecture. ASP-DAC 2009: 135-136 | |
| 2008 | ||
| j1 | Wei Cao, Hui Hou, Jiarong Tong, Jinmei Lai, Hao Min: A high-performance reconfigurable VLSI architecture for vbsme in H.264. IEEE Trans. Consumer Electronics 54(3): 1338-1345 (2008) | |
| c10 | Yi Wang, Wai-Shing Luk, Xuan Zeng, Jun Tao, Changhao Yan, Jiarong Tong, Wei Cai, Jia Ni: Timing yield driven clock skew scheduling considering non-Gaussian distributions of critical path delays. DAC 2008: 223-226 | |
| c9 | Jian Cui, Gengsheng Chen, Ruijing Shen, Sheldon X.-D. Tan, Wenjian Yu, Jiarong Tong: Variational capacitance modeling using orthogonal polynomial method. ACM Great Lakes Symposium on VLSI 2008: 23-28 | |
| 2007 | ||
| c8 | Peng Zhang, Wai-Shing Luk, Yu Song, Jiarong Tong, Pushan Tang, Xuan Zeng: WCOMP: Waveform Comparison Tool for Mixed-signal Validation Regression in Memory Design. ASP-DAC 2007: 209-214 | |
| 2005 | ||
| c7 | Yirong OuYang, Jiarong Tong: A New Universal Test Pattern Auto-generating Approach for FPGA Logic Resources (abstract only). FPGA 2005: 263 | |
| c6 | Wen Yujie, Jiarong Tong, Charles Chiang: Domain Specific Non-Uniform Routing Architecture for Embedded Programmable IP Core (abstract only). FPGA 2005: 269 | |
| 2004 | ||
| c5 | Jian Wang, Xuan Zeng, Wei Cai, Charles Chiang, Jiarong Tong, Dian Zhou: Frequency domain wavelet method with GMRES for large-scale linear circuit simulation. ISCAS (5) 2004: 321-324 | |
| c4 | Lihong Feng, Xuan Zeng, Jiarong Tong, Charles Chiang, Dian Zhou: Two-sided projection method in variational equation model order reduction of nonlinear circuits. ISCAS (4) 2004: 816-819 | |
| 2003 | ||
| c3 | ||
| 1999 | ||
| c2 | Feng Zhou, Zhijun Huang, Jiarong Tong, Pushan Tang: An Analytical Delay Model for SRAM-Based FPGA Interconnections. ASP-DAC 1999: 101-104 | |
| 1998 | ||
| c1 | Rongzheng Zhou, Jiarong Tong, Pushan Tang: FPART: A Multi-way FPGA Partitioning Procedure Based on the Improved FM Algorithm. ASP-DAC 1998: 513-518 | |
Colors in the list of coauthors
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