Hiroyuki Tsujikawa

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	2006
j3		Kenji Shimazaki, Makoto Nagata, Mitsuya Fukazawa, Shingo Miyahara, Masaaki Hirata, Kazuhiro Satoh, Hiroyuki Tsujikawa: An Integrated Timing and Dynamic Supply Noise Verification for Multi-10-Million Gate SoC Designs. IEICE Transactions 89-C(11): 1535-1543 (2006)
	2005
j2		Kenji Shimazaki, Makoto Nagata, Takeshi Okumoto, Shozo Hirano, Hiroyuki Tsujikawa: Dynamic Power-Supply and Well Noise Measurements and Analysis for Low Power Body Biased Circuits. IEICE Transactions 88-C(4): 589-596 (2005)
j1		Hiroyuki Tsujikawa, Kenji Shimazaki, Shozo Hirano, Kazuhiro Sato, Masanori Hirofuji, Junichi Shimada, Mitsumi Ito, Kiyohito Mukai: Power-Supply Noise Reduction with Design for Manufacturability. IEICE Transactions 88-A(12): 3421-3428 (2005)
	2002
c2		Kenji Shimazaki, Shouzou Hirano, Hiroyuki Tsujikawa: An EMI-Noise Analysis on LSI Design with Impedance Estimation. ISQED 2002: 169-174
	2000
c1		Kenji Shimazaki, Hiroyuki Tsujikawa, Seijiro Kojima, Shouzou Hirano: LEMINGS: LSI's EMI-Noise Analysis with Gate Level Simulator. ISQED 2000: 129-136

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