Sascha Uhrig

Marco Paolieri, Jörg Mische, Stefan Metzlaff, Mike Gerdes, Eduardo Quiñones, Sascha Uhrig, Theo Ungerer, Francisco J. Cazorla: A hard real-time capable multi-core SMT processor. ACM Trans. Embedded Comput. Syst. 12(3): 79 (2013)

Sascha Uhrig, Ralf Jahr, Theo Ungerer: Advanced architecture optimisation and performance analysis of a reconfigurable grid ALU processor. IET Computers & Digital Techniques 6(5): 334-341 (2012)

Sascha Uhrig: Implementing a ring-based real-time capable network using a multithreaded Java processor. JTRES 2012: 185-192

Julian Wolf, Bernhard Fechner, Sascha Uhrig, Theo Ungerer: Fine-grained timing and control flow error checking for hard real-time task execution. SIES 2012: 257-266

Julian Wolf, Mike Gerdes, Florian Kluge, Sascha Uhrig, Jörg Mische, Stefan Metzlaff, Christine Rochange, Hugues Cassé, Pascal Sainrat, Theo Ungerer: RTOS support for execution of parallelized hard real-time tasks on the MERASA multi-core processor. Comput. Syst. Sci. Eng. 26(6) (2011)

Stefan Metzlaff, Irakli Guliashvili, Sascha Uhrig, Theo Ungerer: A Dynamic Instruction Scratchpad Memory for Embedded Processors Managed by Hardware. ARCS 2011: 122-134

Sascha Uhrig: Tracing Static Fields of Embedded Parallel Java Applications. COMPSAC Workshops 2011: 516-519

Marco Paolieri, Eduardo Quiñones, Francisco J. Cazorla, Julian Wolf, Theo Ungerer, Sascha Uhrig, Zlatko Petrov: A Software-Pipelined Approach to Multicore Execution of Timing Predictable Multi-threaded Hard Real-Time Tasks. ISORC 2011: 233-240

Theo Ungerer, Francisco J. Cazorla, Pascal Sainrat, Guillem Bernat, Zlatko Petrov, Christine Rochange, Eduardo Quiñones, Mike Gerdes, Marco Paolieri, Julian Wolf, Hugues Cassé, Sascha Uhrig, Irakli Guliashvili, Michael Houston, Florian Kluge, Stefan Metzlaff, Jörg Mische: Merasa: Multicore Execution of Hard Real-Time Applications Supporting Analyzability. IEEE Micro 30(5): 66-75 (2010)

Florian Kluge, Sascha Uhrig, Jörg Mische, Benjamin Satzger, Theo Ungerer: Dynamic Workload Prediction for Soft Real-Time Applications. CIT 2010: 1841-1848

Jörg Mische, Irakli Guliashvili, Sascha Uhrig, Theo Ungerer: How to Enhance a Superscalar Processor to Provide Hard Real-Time Capable In-Order SMT. ARCS 2010: 2-14

Basher Shehan, Ralf Jahr, Sascha Uhrig, Theo Ungerer: Reconfigurable Grid Alu Processor: Optimization and Design Space Exploration. DSD 2010: 71-79

Ralf Jahr, Basher Shehan, Sascha Uhrig, Theo Ungerer: Static Speculation as Post-link Optimization for the Grid Alu Processor. Euro-Par Workshops 2010: 145-152

Sascha Uhrig: The MANy JAva Core processor (MANJAC). HPCS 2010: 188

Julian Wolf, Mike Gerdes, Florian Kluge, Sascha Uhrig, Jörg Mische, Stefan Metzlaff, Christine Rochange, Hugues Cassé, Pascal Sainrat, Theo Ungerer: RTOS Support for Parallel Execution of Hard Real-Time Applications on the MERASA Multi-core Processor. ISORC 2010: 193-201

Martin Schoeberl, Thomas B. Preußer, Sascha Uhrig: The embedded Java benchmark suite JemBench. JTRES 2010: 120-127

Jörg Mische, Sascha Uhrig, Florian Kluge, Theo Ungerer: Using SMT to Hide Context Switch Times of Large Real-Time Tasksets. RTCSA 2010: 255-264

Sascha Uhrig, Theo Ungerer: A Garbage Collection Technique for Embedded Multithreaded Multicore Processors. ARCS 2009: 207-218

Jörg Mische, Sascha Uhrig, Florian Kluge, Theo Ungerer: IPC Control for Multiple Real-Time Threads on an In-Order SMT Processor. HiPEAC 2009: 125-139

Sascha Uhrig: Risks and chances of many-core processors. HPCS 2009: 80

Sascha Uhrig: Evaluation of Different Multithreaded and Multicore Processor Configurations for SoPC. SAMOS 2009: 68-77

Florian Kluge, Chenglong Yu, Jörg Mische, Sascha Uhrig, Theo Ungerer: Implementing AUTOSAR scheduling and resource management on an embedded SMT processor. SCOPES 2009: 33-42

Sascha Uhrig: A Flexible Java-on-Chip Solution (Eine flexible Java-on-Chip Lösung). it - Information Technology 50(5): 317-323 (2008)

Florian Kluge, Jörg Mische, Sascha Uhrig, Theo Ungerer: An Operating System Architecture for Organic Computing in Embedded Real-Time Systems. ATC 2008: 343-357

Jörg Mische, Sascha Uhrig, Florian Kluge, Theo Ungerer: Exploiting spare resources of in-order SMT processors executing hard real-time threads. ICCD 2008: 371-376

Florian Kluge, Sascha Uhrig, Jörg Mische, Theo Ungerer: A Two-Layered Management Architecture for Building Adaptive Real-Time Systems. SEUS 2008: 126-137

Sascha Uhrig, Jörg Wiese: jamuth: an IP processor core for embedded Java real-time systems. JTRES 2007: 230-237

Sascha Uhrig, Jörg Mische, Theo Ungerer: An IP Core for Embedded Java Systems. SAMOS 2007: 263-272

Sascha Uhrig, S. Maier, Georgi Kuzmanov, Theo Ungerer: Coupling of a reconfigurable architecture and a multithreaded processor core with integrated real-time scheduling. IPDPS 2006

Uwe Brinkschulte, Sascha Uhrig, Theo Ungerer: Der mehrfädige Komodo-Mikrocontroller (The Multithreaded Komodo Microcontroller). it - Information Technology 47(3): 117-122 (2005)

Sascha Uhrig, Theo Ungerer: Energy Management for Embedded Multithreaded Processors with Integrated EDF Scheduling. ARCS 2005: 1-17

Sascha Uhrig: Optimierung des Energieverbrauchs in echtzeitfähigen, mehrfädigen Prozessoren. University of Augsburg 2004, isbn 3-8325-0538-5, pp. 1-157

Uwe Brinkschulte, Jürgen Becker, Klaus Dorfmüller-Ulhaas, Ralf König, Sascha Uhrig, Theo Ungerer: CARUSO - Project Goals and Principal Approach. GI Jahrestagung (2) 2004: 616-620

Sascha Uhrig, Theo Ungerer: Fine-grained power management for multithreaded processor cores. SAC 2004: 907-908

Jochen Kreuzinger, Uwe Brinkschulte, Matthias Pfeffer, Sascha Uhrig, Theo Ungerer: Real-time event-handling and scheduling on a multithreaded Java microcontroller. Microprocessors and Microsystems 27(1): 19-31 (2003)

Sascha Uhrig, Theo Ungerer: Hardware-based Power Management for Real-Time Applications. ISPDC 2003: 258-265

Matthias Pfeffer, Sascha Uhrig, Theo Ungerer, Uwe Brinkschulte: A Real-Time Java System on a Multithreaded Java Microcontroller. Symposium on Object-Oriented Real-Time Distributed Computing 2002: 34-