| 2012 | ||
|---|---|---|
| j18 | Judit Freijedo, Jorge Semião, Juan J. Rodríguez-Andina, Fabian Vargas, Isabel C. Teixeira, João Paulo Teixeira: Modeling the Effect of Process, Power-Supply Voltage and Temperature Variations on the Timing Response of Nanometer Digital Circuits. J. Electronic Testing 28(4): 421-434 (2012) | |
| j17 | Marta Portela-Garcia, Almudena Lindoso, Luis Entrena, Mario García-Valderas, Celia López-Ongil, N. Marroni, Bernardo Pianta, Letícia Maria Bolzani Poehls, Fabian Vargas: Evaluating the Effectiveness of a Software-Based Technique Under SEEs Using FPGA-Based Fault Injection Approach. J. Electronic Testing 28(6): 777-789 (2012) | |
| j16 | Juliano Benfica, Letícia Maria Bolzani Poehls, Fabian Vargas, José Lipovetzky, Ariel Lutenberg, Edmundo Gatti, Fernando Hernandez: A Test Platform for Dependability Analysis of SoCs Exposed to EMI and Radiation. J. Electronic Testing 28(6): 803-816 (2012) | |
| c35 | Arthur Ceratti, Thiago Copetti, Letícia Maria Bolzani Poehls, Fabian Vargas: On-chip aging sensor to monitor NBTI effect in nano-scale SRAM. DDECS 2012: 354-359 | |
| 2011 | ||
| j15 | Judit Freijedo, María Dolores Valdés, Lucía Costas, María José Moure, Juan J. Rodríguez-Andina, Jorge Semião, Fabian Vargas, Isabel C. Teixeira, João Paulo Teixeira: Lower VDD Operation of FPGA-Based Digital Circuits Through Delay Modeling and Time Borrowing. J. Low Power Electronics 7(2): 185-198 (2011) | |
| j14 | Víctor H. Champac, Fernanda Gusmão de Lima Kastensmidt, Leticia Maria Veiras Bolzani Poehls, Fabian Vargas, Yervant Zorian: 12th "IEEE Latin-American Test Workshop" Porto de Galinhas, Brazil, 27-30 March 2011. J. Low Power Electronics 7(4): 529-530 (2011) | |
| j13 | Costas Argyrides, Raul Chipana, Fabian Vargas, Dhiraj K. Pradhan: Reliability Analysis of H-Tree Random Access Memories Implemented With Built in Current Sensors and Parity Codes for Multiple Bit Upset Correction. IEEE Transactions on Reliability 60(3): 528-537 (2011) | |
| c34 | Dhiego Silva, K. Stangherlin, Leticia Maria Veiras Bolzani, Fabian Vargas: A Hardware-Based Approach for Fault Detection in RTOS-Based Embedded Systems. European Test Symposium 2011: 209 | |
| c33 | Vasco Bexiga, Carlos Leong, Jorge Semião, Isabel C. Teixeira, João Paulo Teixeira, María Dolores Valdés, Judit Freijedo, Juan J. Rodríguez-Andina, Fabian Vargas: Performance Failure Prediction Using Built-In Delay Sensors in FPGAs. FPL 2011: 301-304 | |
| c32 | Dhiego Silva, Leticia Maria Veiras Bolzani, Fabian Vargas: An intellectual property core to detect task schedulling-related faults in RTOS-based embedded systems. IOLTS 2011: 19-24 | |
| 2010 | ||
| j12 | Judit Freijedo, Lucía Costas, Jorge Semião, Juan J. Rodríguez-Andina, María José Moure, Fabian Vargas, Isabel C. Teixeira, João Paulo Teixeira: Impact of Power Supply Voltage Variations on FPGA-Based Digital Systems Performance. J. Low Power Electronics 6(2): 339-349 (2010) | |
| c31 | F. Lavratti, Alex R. Pinto, Leticia Maria Veiras Bolzani, Fabian Vargas, Carlos B. Montez, Fernando Hernandez, Edmundo Gatti, C. Silva: Evaluating a Transmission Power Self-Optimization Technique for WSN in EMI Environments. DSD 2010: 509-515 | |
| c30 | Raul Chipana, Leticia Maria Veiras Bolzani, Fabian Vargas, Jorge Semião, Juan J. Rodríguez-Andina, Isabel C. Teixeira, Paulo J. Teixeira: Investigating the Use of BICS to detect resistive-open defects in SRAMs. IOLTS 2010: 200-201 | |
| 2009 | ||
| c29 | Jimmy Tarrillo, Leticia Maria Veiras Bolzani Poehls, Fabian Vargas: A Hardware-Scheduler for Fault Detection in RTOS-Based Embedded Systems. DSD 2009: 341-347 | |
| c28 | Fabian Vargas, Claudia A. Rocha, Bernardo Pianta, Marta Portela-García, Celia López-Ongil, Mario García-Valderas, Luis Entrena: Briefing power/reliability optimization in embedded software design. IOLTS 2009: 185-186 | |
| c27 | Jorge Semião, Judit Freijedo, Juan J. Rodríguez-Andina, Fabian Vargas, Marcelino B. Santos, Isabel C. Teixeira, João Paulo Teixeira: Delay-fault tolerance to power supply Voltage disturbances analysis in nanometer technologies. IOLTS 2009: 223-228 | |
| 2008 | ||
| j11 | Jorge Semião, Marcial Jesús Rodríguez-Irago, Juan J. Rodríguez-Andina, Leonardo Bisch Piccoli, Fabian Vargas, Marcelino Bicho Dos Santos, Isabel Maria Cacho Teixeira, João Paulo Teixeira: Signal Integrity Enhancement in Digital Circuits. IEEE Design & Test of Computers 25(5): 452-461 (2008) | |
| j10 | Judit Freijedo, Jorge Semião, Juan J. Rodríguez-Andina, Fabian Vargas, Isabel C. Teixeira, Paulo J. Teixeira: Delay Modeling for Power Noise and Temperature-Aware Design and Test of Digital Systems. J. Low Power Electronics 4(3): 385-391 (2008) | |
| j9 | Jorge Semião, Judit Freijedo, Juan J. Rodríguez-Andina, Fabian Vargas, Marcelino B. Santos, Isabel C. Teixeira, Paulo J. Teixeira: Time Management for Low-Power Design of Digital Systems. J. Low Power Electronics 4(3): 410-419 (2008) | |
| c26 | Jorge Semião, Juan J. Rodríguez-Andina, Fabian Vargas, Marcelino B. Santos, Isabel C. Teixeira, João Paulo Teixeira: Process Tolerant Design Using Thermal and Power-Supply Tolerance in Pipeline Based Circuits. DDECS 2008: 34-37 | |
| c25 | Costas Argyrides, Fabian Vargas, Marlon Moraes, Dhiraj K. Pradhan: Embedding Current Monitoring in H-Tree RAM Architecture for Multiple SEU Tolerance and Reliability Improvement. IOLTS 2008: 155-160 | |
| c24 | Jorge Semião, Judit Freijedo, Juan J. Rodríguez-Andina, Fabian Vargas, Marcelino B. Santos, Isabel C. Teixeira, João Paulo Teixeira: Exploiting Parametric Power Supply and/or Temperature Variations to Improve Fault Tolerance in Digital Circuits. IOLTS 2008: 227-232 | |
| 2007 | ||
| c23 | Jorge Semião, Judit Freijedo, Juan J. Rodríguez-Andina, Fabian Vargas, Marcelino B. Santos, Isabel C. Teixeira, João Paulo Teixeira: Improving Tolerance to Power-Supply and Temperature Variations in Synchronous Circuits. DDECS 2007: 295-300 | |
| c22 | Jorge Semião, Juan J. Rodríguez-Andina, Fabian Vargas, Marcelino Bicho Dos Santos, Isabel C. Teixeira, João Paulo Teixeira: Improving the Tolerance of Pipeline Based Circuits to Power Supply or Temperature Variations. DFT 2007: 303-311 | |
| c21 | Fabian Vargas, Leonardo Piccoli, Juliano Benfica, Antonio A. de Alecrim Jr., Marlon Moraes: Time-Sensitive Control-Flow Checking for Multitask Operating System-Based SoCs. IOLTS 2007: 93-100 | |
| c20 | Jorge Semião, Judit Freijedo, Juan J. Rodríguez-Andina, Fabian Vargas, Marcelino B. Santos, Isabel C. Teixeira, João Paulo Teixeira: On-line Dynamic Delay Insertion to Improve Signal Integrity in Synchronous Circuits. IOLTS 2007: 167-172 | |
| c19 | Jorge Semião, Judit Freijedo, Juan J. Rodríguez-Andina, Fabian Vargas, Marcelino B. Santos, Isabel C. Teixeira, João Paulo Teixeira: Enhancing the Tolerance to Power-Supply Instability in Digital Circuits. ISVLSI 2007: 207-212 | |
| 2006 | ||
| j8 | ||
| j7 | Fabian Vargas: Design and test on chip for EMC. IEEE Design & Test of Computers 23(6): 502-503 (2006) | |
| j6 | Paolo Bernardi, Leticia Maria Veiras Bolzani, Maurizio Rebaudengo, Matteo Sonza Reorda, Fabian Vargas, Massimo Violante: A New Hybrid Fault Detection Technique for Systems-on-a-Chip. IEEE Trans. Computers 55(2): 185-198 (2006) | |
| c18 | Fabian Vargas, Leonardo Picolli, Antonio A. de Alecrim Jr., Marlon Moraes, Marcio Gama: Summarizing a time-sensitive control-flow checking monitoring for multitask systems-on-chip. FPT 2006: 249-252 | |
| c17 | Marcial Jesús Rodríguez-Irago, Juan J. Rodríguez-Andina, Fabian Vargas, Jorge Semião, Isabel C. Teixeira, João Paulo Teixeira: Dynamic Fault Detection in Digital Systems Using Dynamic Voltage Scaling and Multi-Temperature Schemes. IOLTS 2006: 257-262 | |
| 2005 | ||
| j5 | D. Barros Júnior, Marcial Jesús Rodríguez-Irago, Marcelino B. Santos, Isabel C. Teixeira, Fabian Vargas, João Paulo Teixeira: Fault Modeling and Simulation of Power Supply Voltage Transients in Digital Systems on a Chip. J. Electronic Testing 21(4): 349-363 (2005) | |
| c16 | Paolo Bernardi, Leticia Maria Veiras Bolzani, Maurizio Rebaudengo, Matteo Sonza Reorda, Fabian Vargas, Massimo Violante: On-Line Detection of Control-Flow Errors in SoCs by Means of an Infrastructure IP Core. DSN 2005: 50-58 | |
| c15 | Fabian Vargas, D. L. Cavalcante, Edmundo Gatti, Dárcio Prestes, D. Lupi: On the Proposition of an EMI-Based Fault Injection Approach. IOLTS 2005: 207-208 | |
| c14 | Marcial Jesús Rodríguez-Irago, Juan J. Rodríguez-Andina, Fabian Vargas, Marcelino B. Santos, Isabel C. Teixeira, João Paulo Teixeira: Dynamic Fault Test and Diagnosis in Digital Systems Using Multiple Clock Schemes and Multi-VDD Test. IOLTS 2005: 281-286 | |
| 2004 | ||
| j4 | ||
| j3 | Fabian Vargas, Rubem Dutra Ribeiro Fagundes, Daniel Barros Jr., Diogo B. Brum, Eduardo Luis Rhod: Merging a DSP-Oriented Signal Integrity Technique and SW-Based Fault Handling Mechanisms to Ensure Reliable DSP Systems. J. Electronic Testing 20(4): 397-411 (2004) | |
| c13 | Daniel Barros Jr., Fabian Vargas, Marcelino B. Santos, Isabel C. Teixeira, João Paulo Teixeira: Modeling and Simulation of Time Domain Faults in Digital Systems. IOLTS 2004: 5-10 | |
| c12 | Leticia Maria Veiras Bolzani, Maurizio Rebaudengo, Matteo Sonza Reorda, Fabian Vargas, Massimo Violante: Hybrid Soft Error Detection by Means of Infrastructure IP Cores. IOLTS 2004: 79-88 | |
| 2003 | ||
| j2 | Fabian Vargas, Rubem Dutra Ribeiro Fagundes, Daniel Barros Jr.: A New On-Line Robust Approach to Design Noise-Immune Speech Recognition Systems. J. Electronic Testing 19(1): 61-72 (2003) | |
| c11 | Fabian Vargas, Rubem Dutra Ribeiro Fagundes, Daniel Barros Jr., Diogo B. Brum: Briefing a New Approach to Improve the EMI Immunity of DSP Systems. Asian Test Symposium 2003: 468-473 | |
| c10 | Fabian Vargas, Diogo B. Brum, Dárcio Prestes, Leticia Maria Veiras Bolzani, Eduardo Luis Rhod, Matteo Sonza Reorda: Introducing SW-Based Fault Handling Mechanisms to Cope with EMI in Embedded Electronics: Are They A Good Remedy? IOLTS 2003: 163 | |
| 2002 | ||
| c9 | Fabian Vargas, Djones Lettnin, Diogo B. Brum, Dárcio Prestes: A New Learning Approach to Design Fault Tolerant ANNs: Finally a Zero HW-SW Overhead. Asian Test Symposium 2002: 218-223 | |
| c8 | Fabian Vargas, Rubem Dutra Ribeiro Fagundes, Daniel Barros Jr.: Experimental Results of a Recovery Block Scheme to Handle Noise in Speech Recognition Systems. Asian Test Symposium 2002: 224-229 | |
| c7 | Fabian Vargas, Rubem Dutra Ribeiro Fagundes, Daniel Barros Jr.: A New On-Line Robust Approach to Design Noise Immune Speech Recognition Systems. IOLTW 2002: 187 | |
| c6 | Fabian Vargas, Maria Cristina Felippetto de Castro, Marcello Macarthy, Djones Lettnin: Electrocardiogram Pattern Recognition by Means of MLP Network and PCA: A Case Study on Equal Amount of Input Signal Types. SBRN 2002: 200-205 | |
| 2001 | ||
| j1 | Eduardo Augusto Bezerra, Fabian Vargas, Michael Paul Gough: Improving Reconfigurable Systems Reliability by Combining Periodical Test and Redundancy Techniques: A Case Study. J. Electronic Testing 17(2): 163-174 (2001) | |
| c5 | Fabian Vargas, Rubem Dutra Ribeiro Fagundes, Daniel Barros Jr.: A New Approach to Design Reliable Real-Time Speech Recognition Systems. IOLTW 2001: 187-191 | |
| 2000 | ||
| c4 | Fabian Vargas, Alexandre M. Amory: Transient-fault tolerant VHDL descriptions: a case-study for area overhead analysis. Asian Test Symposium 2000: 417-422 | |
| c3 | Fabian Vargas, Alexandre M. Amory, Raoul Velazco: Estimating Circuit Fault-Tolerance by Means of Transient-Fault Injection in VHDL. IOLTW 2000: 67-72 | |
| 1998 | ||
| c2 | Fabian Vargas, E. Bezerra, L. Wulff, Daniel Barros Jr.: Optimizing HW/SW Codesign towards Reliability for Critical-Application Systems. Asian Test Symposium 1998: 52-57 | |
| 1995 | ||
| c1 | Fabian Vargas, Michael Nicolaidis, Yervant Zorian: An Approach for Designing Total-Dose Tolerant MCMs Based on Current Monitoring. ITC 1995: 345-354 | |
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