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Diederik Verkest
2010 – today
- 2013
[c72]Dragomir Milojevic, Pol Marchal, Erik Jan Marinissen, Geert Van der Plas, Diederik Verkest, Eric Beyne: Design issues in heterogeneous 3D/2.5D integration. ASP-DAC 2013: 403-410- [c71]Arindam Mallik, Paul Zuber, Tsung-Te Liu, Bharani Chava, Bhavana Ballal, Pablo Royer Del Bario, Rogier Baert, Kris Croes, Julien Ryckaert, Mustafa Badaroglu, Abdelkarim Mercha, Diederik Verkest: TEASE: a systematic analysis framework for early evaluation of FinFET-based advanced technology nodes. DAC 2013: 24
- 2012
- [j32]Pavel Poliakov, Pieter Blomme, Alessandro Vaglio Pret, Miguel Corbalan Miranda, Roel Gronheid, Diederik Verkest, Jan Van Houdt, Wim Dehaene: Trades-off between lithography line edge roughness and error-correcting codes requirements for NAND Flash memories. Microelectronics Reliability 52(3): 525-529 (2012)
- 2011
- [c70]Andrej Ivankovic, Geert Van der Plas, V. Moroz, M. Choi, Vladimir Cherman, Abdelkarim Mercha, Paul Marchal, Marcel Gonzalez, Geert Eneman, W. Zhang, Thibault Buisson, Mikael Detalle, Antonio La Manna, Diederik Verkest, Gerald Beyer, Eric Beyne, Bart Vandevelde, Ingrid De Wolf, Dirk Vandepitte: Analysis of microbump induced stress effects in 3D stacked IC technologies. 3DIC 2011: 1-5
- [c69]Lu Zhang, Ke Zhang, Tian Sheuan Chang, Gauthier Lafruit, Georgi Krasimirov Kuzmanov, Diederik Verkest: Real-time high-definition stereo matching on FPGA. FPGA 2011: 55-64
- 2010
- [j31]Pavel Poliakov, Ankur Anchlia, Marie Garcia Bardon, Bram Rooseleer, Bart De Wachter, Nadine Collaert, Koen van der Zanden, Wim Dehaene, Diederik Verkest, Miguel Corbalan Miranda: Circuit Design for Bias Compatibility in Novel FinFET-Based Floating-Body RAM. IEEE Trans. on Circuits and Systems 57-II(3): 183-187 (2010)
- [j30]Bert Geelen, Vissarion Ferentinos, Francky Catthoor, Gauthier Lafruit, Diederik Verkest, Rudy Lauwereins, Thanos Stouraitis: Modeling and exploiting spatial locality trade-offs in wavelet-based applications under varying resource requirements. ACM Trans. Embedded Comput. Syst. 9(3) (2010)
- [j29]Vincent Nollet, Diederik Verkest, Henk Corporaal: A Safari Through the MPSoC Run-Time Management Jungle. Signal Processing Systems 60(2): 251-268 (2010)
2000 – 2009
- 2009
- [j28]Praveen Raghavan, Andy Lambrechts, Murali Jayapala, Francky Catthoor, Diederik Verkest: EMPIRE: Empirical power/area/timing models for register files. Microprocessors and Microsystems - Embedded Hardware Design 33(4): 295-300 (2009)
- [j27]Praveen Raghavan, Andy Lambrechts, Murali Jayapala, Francky Catthoor, Diederik Verkest: Distributed Loop Controller for Multithreading in Unithreaded ILP Architectures. IEEE Trans. Computers 58(3): 311-321 (2009)
- [j26]Bert Geelen, Vissarion Ferentinos, Francky Catthoor, Gauthier Lafruit, Diederik Verkest, Rudy Lauwereins, Thanos Stouraitis: Spatial locality exploitation for runtime reordering of JPEG2000 wavelet data layouts. ACM Trans. Design Autom. Electr. Syst. 15(1) (2009)
- [j25]Andy Lambrechts, Praveen Raghavan, Murali Jayapala, Bingfeng Mei, Francky Catthoor, Diederik Verkest: Interconnect Exploration for Energy Versus Performance Tradeoffs for Coarse Grained Reconfigurable Architectures. IEEE Trans. VLSI Syst. 17(1): 151-155 (2009)
- [j24]Bert Geelen, Vissarion Ferentinos, Francky Catthoor, Spyridon Toulatos, Gauthier Lafruit, Thanos Stouraitis, Rudy Lauwereins, Diederik Verkest: Exploiting Varying Resource Requirements in Wavelet-based Applications in Dynamic Execution Environments. Signal Processing Systems 56(2-3): 125-139 (2009)
- [j23]Dragomir Milojevic, Luc J. M. Montperrus, Diederik Verkest: Power Dissipation of the Network-on-Chip in Multi-Processor System-on-Chip Dedicated for Video Coding Applications. Signal Processing Systems 57(2): 139-153 (2009)
- [j22]Bjorn De Sutter, Diederik Verkest, Erik Brockmeyer, Eric Delfosse, Arnout Vandecappelle, Jean-Yves Mignolet: Design and Tool Flow of Multimedia MPSoC Platforms. Signal Processing Systems 57(2): 229-247 (2009)
- [c68]
- 2008
- [j21]David Atienza, Praveen Raghavan, José Luis Ayala, Giovanni De Micheli, Francky Catthoor, Diederik Verkest, Marisa López-Vallejo: Joint hardware-software leakage minimization approach for the register file of VLIW embedded architectures. Integration 41(1): 38-48 (2008)
- [j20]Bruno Bougard, Bjorn De Sutter, Diederik Verkest, Liesbet Van der Perre, Rudy Lauwereins: A Coarse-Grained Array Accelerator for Software-Defined Radio Baseband Processing. IEEE Micro 28(4): 41-50 (2008)
- [j19]Anthony Leroy, Dragomir Milojevic, Diederik Verkest, Frédéric Robert, Francky Catthoor: Concepts and Implementation of Spatial Division Multiplexing for Guaranteed Throughput in Networks-on-Chip. IEEE Trans. Computers 57(9): 1182-1195 (2008)
- [j18]Vincent Nollet, Prabhat Avasare, Hendrik Eeckhaut, Diederik Verkest, Henk Corporaal: Run-Time Management of a MPSoC Containing FPGA Fabric Tiles. IEEE Trans. VLSI Syst. 16(1): 24-33 (2008)
- [c67]Praveen Raghavan, Andy Lambrechts, Javed Absar, Murali Jayapala, Francky Catthoor, Diederik Verkest: Coffee: COmpiler Framework for Energy-Aware Exploration. HiPEAC 2008: 193-208
- [c66]Bert Geelen, Aris Ferentinos, Francky Catthoor, Gauthier Lafruit, Diederik Verkest: Spatial locality trade-offs of wavelet-based applications in dynamic execution environments. ICASSP 2008: 1461-1464
- [c65]Mladen Berekovic, Frank Bouwens, Tom Vander Aa, Diederik Verkest: Interconnect Power Analysis for a Coarse-Grained Reconfigurable Array Processor. PATMOS 2008: 449-457
- [c64]Andy Lambrechts, Praveen Raghavan, Murali Jayapala, Francky Catthoor, Diederik Verkest: Energy-Aware Interconnect Optimization for a Coarse Grained Reconfigurable Processor. VLSI Design 2008: 201-207
- 2007
- [j17]Kristof Denolf, Marco Jan Gerrit Bekooij, Johan Cockx, Diederik Verkest, Henk Corporaal: Exploiting the Expressiveness of Cyclo-Static Dataflow to Model Multimedia Implementations. EURASIP J. Adv. Sig. Proc. 2007 (2007)
- [j16]Kristof Denolf, Adrian Chirila-Rus, Paul R. Schumacher, Robert D. Turney, Kees A. Vissers, Diederik Verkest, Henk Corporaal: A Systematic Approach to Design Low-Power Video Codec Cores. EURASIP J. Emb. Sys. 2007 (2007)
- [j15]José L. Ayala, Marisa López-Vallejo, David Atienza, Praveen Raghavan, Francky Catthoor, Diederik Verkest: Energy-aware compilation and hardware design for VLIW embedded systems. IJES 3(1/2): 73-82 (2007)
- [c63]Praveen Raghavan, Satyakiran Munaga, Estela Rey Ramos, Andy Lambrechts, Murali Jayapala, Francky Catthoor, Diederik Verkest: A Customized Cross-Bar for Data-Shuffling in Domain-Specific SIMD Processors. ARCS 2007: 57-68
- [c62]Praveen Raghavan, Andy Lambrechts, Murali Jayapala, Francky Catthoor, Diederik Verkest, Henk Corporaal: Very wide register: an asymmetric register file organization for low power embedded processors. DATE 2007: 1066-1071
- [c61]Vissarion Ferentinos, Bert Geelen, Francky Catthoor, Gauthier Lafruit, Thanos Stouraitis, Rudy Lauwereins, Diederik Verkest: Adaptive mapping to resource availability for dynamic wavelet-based applications. ESTImedia 2007: 53-58
- [c60]Praveen Raghavan, Nandhavel Sethubalasubramanian, Satyakiran Munaga, Estela Rey Ramos, Murali Jayapala, Oliver Weiss, Francky Catthoor, Diederik Verkest: Semi Custom Design: A Case Study on SIMD Shufflers. PATMOS 2007: 433-442
- 2006
- [c59]Praveen Raghavan, Andy Lambrechts, Murali Jayapala, Francky Catthoor, Diederik Verkest: Distributed loop controller architecture for multi-threading in uni-threaded VLIW processors. DATE 2006: 339-344
- [c58]Vincent Nollet, Prabhat Avasare, Diederik Verkest, Henk Corporaal: Exploiting Hierarchical Configuration to Improve Run-Time MPSoC Task Assignment. ERSA 2006: 49-55
- [c57]Daniele Paolo Scarpazza, Praveen Raghavan, David Novo, Francky Catthoor, Diederik Verkest: Software Simultaneous Multi-Threading, a Technique to Exploit Task-Level Parallelism to Improve Instruction- and Data-Level Parallelism. PATMOS 2006: 12-23
- [c56]David Atienza, Praveen Raghavan, José L. Ayala, Giovanni De Micheli, Francky Catthoor, Diederik Verkest, Marisa López-Vallejo: Compiler-Driven Leakage Energy Reduction in Banked Register Files. PATMOS 2006: 107-116
- [c55]Bert Geelen, Aris Ferentinos, Francky Catthoor, Arnout Vandecappelle, Gauthier Lafruit, Thanos Stouraitis, Rudy Lauwereins, Diederik Verkest: Software-Controlled Scratchpad Mapping Strategies for Wavelet-Based Applications. SiPS 2006: 362-367
- 2005
- [j14]Bingfeng Mei, Andy Lambrechts, Diederik Verkest, Jean-Yves Mignolet, Rudy Lauwereins: Architecture Exploration for a Reconfigurable Architecture Template. IEEE Design & Test of Computers 22(2): 90-101 (2005)
- [j13]Javier Resano, Daniel Mozos, Diederik Verkest, Francky Catthoor: A Reconfiguration Manager for Dynamically Reconfigurable Hardware. IEEE Design & Test of Computers 22(5): 452-460 (2005)
- [c54]Andy Lambrechts, Praveen Raghavan, Anthony Leroy, Guillermo Talavera, Tom Vander Aa, Murali Jayapala, Francky Catthoor, Diederik Verkest, Geert Deconinck, Henk Corporaal, Frédéric Robert, Jordi Carrabina: Power Breakdown Analysis for a Heterogeneous NoC Platform Running a Video Application. ASAP 2005: 179-184
- [c53]Anthony Leroy, Paul Marchal, Adelina Shickova, Francky Catthoor, Frédéric Robert, Diederik Verkest: Spatial division multiplexing: a novel approach for guaranteed throughput on NoCs. CODES+ISSS 2005: 81-86
- [c52]Vincent Nollet, Prabhat Avasare, Jean-Yves Mignolet, Diederik Verkest: Low Cost Task Migration Initiation in a Heterogeneous MP-SoC. DATE 2005: 252-253
- [c51]Prabhat Avasare, Vincent Nollet, Jean-Yves Mignolet, Diederik Verkest, Henk Corporaal: Centralized end-to-end flow control in a best-effort network-on-chip. EMSOFT 2005: 17-20
- [c50]Richard Stahl, Francky Catthoor, Diederik Verkest: Object-Distribution Analysis: Technique for Parallel Loop Distribution of Object-Oriented Programs. ICPP Workshops 2005: 153-160
- [c49]Richard Stahl, Francky Catthoor, Diederik Verkest: Object-Distribution Analysis for Program Decomposition and Re-Clustering. IPDPS 2005
- [c48]Bert Geelen, Gauthier Lafruit, Vissarion Ferentinos, Rudy Lauwereins, Diederik Verkest: Memory Hierarchy Energy Cost of a Direct Filtering Implementation of the Wavelet Transform. PATMOS 2005: 107-116
- [e1]Vassilis Paliouras, Johan Vounckx, Diederik Verkest (Eds.): Integrated Circuit and System Design, Power and Timing Modeling, Optimization and Simulation, 15th International Workshop, PATMOS 2005, Leuven, Belgium, September 21-23, 2005, Proceedings. Lecture Notes in Computer Science 3728, Springer 2005, ISBN 3-540-29013-3
- 2004
- [j12]Théodore Marescaux, Vincent Nollet, Jean-Yves Mignolet, Andrei Bartic, W. Moffat, Prabhat Avasare, Paul Coene, Diederik Verkest, Serge Vernalde, Rudy Lauwereins: Run-time support for heterogeneous multitasking on reconfigurable SoCs. Integration 38(1): 107-130 (2004)
- [j11]Javier Resano, Diederik Verkest, Daniel Mozos, Serge Vernalde, Francky Catthoor: A hybrid design-time/run-time scheduling flow to minimise the reconfiguration overhead of FPGAs. Microprocessors and Microsystems 28(5-6): 291-301 (2004)
- [c47]Vincent Nollet, Théodore Marescaux, Diederik Verkest, Jean-Yves Mignolet, Serge Vernalde: Operating-system controlled network on chip. DAC 2004: 256-259
- [c46]Bingfeng Mei, Serge Vernalde, Diederik Verkest, Rudy Lauwereins: Design Methodology for a Tightly Coupled VLIW/Reconfigurable Matrix Architecture: A Case Study. DATE 2004: 1224-1229
- [c45]Richard Stahl, Francky Catthoor, Rudy Lauwereins, Diederik Verkest: Design-Time Data-Access Analysis for Parallel Java Programs with Shared-Memory Communication Model. Euro-Par 2004: 206-213
- [c44]Andrei Bartic, Dirk Desmet, Jean-Yves Mignolet, Théodore Marescaux, Diederik Verkest, Serge Vernalde, Rudy Lauwereins, J. Miller, Frédéric Robert: Network-on-Chip for Reconfigurable Systems: From High-Level Design Down to Implementation. FPL 2004: 637-647
- [c43]Richard Stahl, Robert Pasko, Francky Catthoor, Rudy Lauwereins, Diederik Verkest: High-Level Data-Access Analysis for Characterisation of (Sub)task-Level Parallelism in Java. HIPS 2004: 31-40
- [c42]Andy Lambrechts, Tom Vander Aa, Murali Jayapala, Guillermo Talavera, Anthony Leroy, Adelina Shickova, Francisco Barat, Bingfeng Mei, Francky Catthoor, Diederik Verkest, Geert Deconinck, Henk Corporaal, Frédéric Robert, Jordi Carrabina Bordoll: Design Style Case Study for Embedded Multi Media Compute Nodes. RTSS 2004: 104-113
- 2003
- [j10]Theofanis Orphanoudakis, Stylianos Perissakis, Kostas Pramataris, Nikos A. Nikolaou, Nicholas Zervos, Matthias Steck, Christoph Baumhof, Diederik Verkest, Chantal Ykman-Couvreur, Gregory Doumenis, Fotis Karoubalis, Ioanna Theologitou, Dionisios I. Reisis, George E. Konstantoulakis, Nikos Vogiatzis: Hardware Architectures for the Efficient Implementation of Multi-Service Broadband Access and Multimedia Home Networks. Telecommunication Systems 23(3-4): 351-367 (2003)
- [j9]Frederik Vermeulen, Francky Catthoor, Lode Nachtergaele, Diederik Verkest, Hugo De Man: Power-efficient flexible processor architecture for embedded applications. IEEE Trans. VLSI Syst. 11(3): 376-385 (2003)
- [c41]Bingfeng Mei, Serge Vernalde, Diederik Verkest, Hugo De Man, Rudy Lauwereins: Exploiting Loop-Level Parallelism on Coarse-Grained Reconfigurable Architectures Using Modulo Scheduling. DATE 2003: 10296-10301
- [c40]Jean-Yves Mignolet, Vincent Nollet, Paul Coene, Diederik Verkest, Serge Vernalde, Rudy Lauwereins: Infrastructure for Design and Management of Relocatable Tasks in a Heterogeneous Reconfigurable System-on-Chip. DATE 2003: 10986-10993
- [c39]Vincent Nollet, Jean-Yves Mignolet, Andrei Bartic, Diederik Verkest, Serge Vernalde, Rudy Lauwereins: Hierarchical Run-Time Reconfiguration Managed by an Operating System for Reconfigurable Systems. Engineering of Reconfigurable Systems and Algorithms 2003: 81-87
- [c38]Javier Resano, Diederik Verkest, Daniel Mozos, Serge Vernalde, Francky Catthoor: Run-Time Scheduling for Multimedia Applications on Dynamically Reconfigurable Systems. ESTImedia 2003: 156-162
- [c37]Javier Resano, Diederik Verkest, Daniel Mozos, Serge Vernalde, Francky Catthoor: Application of Task Concurrency Management on Dynamically Reconfigurable Hardware Platforms. FCCM 2003: 278-279
- [c36]Bingfeng Mei, Serge Vernalde, Diederik Verkest, Hugo De Man, Rudy Lauwereins: ADRES: An Architecture with Tightly Coupled VLIW Processor and Coarse-Grained Reconfigurable Matrix. FPL 2003: 61-70
- [c35]Javier Resano, Daniel Mozos, Diederik Verkest, Serge Vernalde, Francky Catthoor: Run-Time Minimization of Reconfiguration Overhead in Dynamically Reconfigurable Systems. FPL 2003: 585-594
- [c34]Théodore Marescaux, Jean-Yves Mignolet, Andrei Bartic, W. Moffat, Diederik Verkest, Serge Vernalde, Rudy Lauwereins: Networks on Chip as Hardware Components of an OS for Reconfigurable Systems. FPL 2003: 595-605
- [c33]Vincent Nollet, Paul Coene, Diederik Verkest, Serge Vernalde, Rudy Lauwereins: Designing an Operating System for a Heterogeneous Reconfigurable So. IPDPS 2003: 174
- [c32]Richard Stahl, Robert Pasko, Luc Rijnders, Diederik Verkest, Serge Vernalde, Rudy Lauwereins, Francky Catthoor: Performance Analysis for Identification of (Sub-)Task-Level Parallelism in Java. SCOPES 2003: 313-328
- 2002
- [j8]Chantal Ykman-Couvreur, J. Lambrecht, Diederik Verkest, Francky Catthoor, Bengt Svantesson, Ahmed Hemani, F. Wolf: Dynamic memory management methodology applied to embedded telecom network systems. IEEE Trans. VLSI Syst. 10(5): 650-667 (2002)
- [c31]Chantal Ykman-Couvreur, J. Lambrecht, Diederik Verkest, Francky Catthoor, Aristides Nikologiannis, George E. Konstantoulakis: System-level performance optimization of the data queueing memory management in high-speed network processors. DAC 2002: 518-523
- [c30]Steve Guccione, Diederik Verkest, Ivo Bolsens: Design Technology for Networked Reconfigurable FPGA Platforms. DATE 2002: 994-997
- [c29]Théodore Marescaux, Andrei Bartic, Diederik Verkest, Serge Vernalde, Rudy Lauwereins: Interconnection Networks Enable Fine-Grain Dynamic Multi-tasking on FPGAs. FPL 2002: 795-805
- [c28]Yajun Ha, Radovan Hipik, Serge Vernalde, Diederik Verkest, Marc Engels, Rudy Lauwereins, Hugo De Man: Adding Hardware Support to the HotSpot Virtual Machine for Domain Specific Applications. FPL 2002: 1135-1138
- [c27]Bingfeng Mei, Serge Vernalde, Diederik Verkest, Hugo De Man, Rudy Lauwereins: DRESC: a retargetable compiler for coarse-grained reconfigurable architectures. FPT 2002: 166-173
- [c26]Dirk Desmet, Prabhat Avasare, Paul Coene, Stijn Decneut, Filip Hendrickx, Théodore Marescaux, Jean-Yves Mignolet, Robert Pasko, Patrick Schaumont, Diederik Verkest: Design of Cam-E-leon, a Run-Time Reconfigurable Web Camera. Embedded Processor Design Challenges 2002: 274-290
- 2001
- [j7]Peng Yang, Chun Wong, Paul Marchal, Francky Catthoor, Dirk Desmet, Diederik Verkest, Rudy Lauwereins: Energy-Aware Runtime Scheduling for Embedded-Multiprocessor SOCs. IEEE Design & Test of Computers 18(5): 46-58 (2001)
- [c25]Chun Wong, Paul Marchal, Peng Yang, Francky Catthoor, Hugo De Man, Aggeliki S. Prayati, Nathalie Cossement, Rudy Lauwereins, Diederik Verkest: Task concurrency management methodology summary. DATE 2001: 813
- [c24]Diederik Verkest, Peng Yang, Chun Wong, Paul Marchal: Optimisation Problems for Dynamic Concurrent Task-Based Systems. ICCAD 2001: 265-
- [c23]Tycho van Meeuwen, Arnout Vandecappelle, Allert van Zelst, Francky Catthoor, Diederik Verkest: System-level interconnect architecture exploration for custom memory organizations. ISSS 2001: 13-18
- [c22]Miguel Miranda, C. Ghez, Chidamber Kulkarni, Francky Catthoor, Diederik Verkest: Systematic speed-power memory data-layout exploration for cache controlled embedded multimedia applications. ISSS 2001: 107-112
- 2000
- [j6]Frederik Vermeulen, Francky Catthoor, Diederik Verkest, Hugo De Man: Formalized three-layer system-level model and reuse methodology for embedded data-dominated applications. IEEE Trans. VLSI Syst. 8(2): 207-216 (2000)
- [c21]Peng Yang, Dirk Desmet, Francky Catthoor, Diederik Verkest: Dynamic scheduling of concurrent tasks with cost performance trade-off. CASES 2000: 103-109
- [c20]Frederik Vermeulen, Francky Catthoor, Diederik Verkest, Hugo De Man: Extended design reuse trade-offs in hardware-software architecture mapping. CODES 2000: 103-107
- [c19]Dirk Desmet, Diederik Verkest, Hugo De Man: Operating system based software generation for systems-on-chip. DAC 2000: 396-401
- [c18]Diederik Verkest, Joachim Kunkel, Frank Schirrmeister: System Level Design Using C++. DATE 2000: 74-81
- [c17]Frederik Vermeulen, Francky Catthoor, Hugo De Man, Diederik Verkest: Formalized Three-Layer System-Level Reuse Model and Methodology for Embedded Data-Dominated Applications. DATE 2000: 92-98
- [c16]Aggeliki S. Prayati, Chun Wong, Paul Marchal, Nathalie Cossement, Francky Catthoor, Rudy Lauwereins, Diederik Verkest, Hugo De Man, Alexios N. Birbas: Task Concurrency Management Experiment for Power-Efficient Speed-up of Embedded MPEG4 IM1 Player. ICPP Workshops 2000: 453-460
- [c15]Frederik Vermeulen, Lode Nachtergaele, Francky Catthoor, Diederik Verkest, Hugo De Man: Flexible hardware acceleration for multimedia oriented microprocessors. MICRO 2000: 171-177
- [c14]Paul Marchal, Chun Wong, Aggeliki S. Prayati, Nathalie Cossement, Francky Catthoor, Rudy Lauwereins, Diederik Verkest, Hugo De Man: Dynamic Memory Oriented Transformations in the MPEG4 IM1-Player on a Low Power Platform. PACS 2000: 40-50
1990 – 1999
- 1999
- [j5]Gaetano Borriello, Diederik Verkest, Francky Catthoor: Guest Editorial. IEEE Trans. on CAD of Integrated Circuits and Systems 18(1): 1-2 (1999)
- [j4]Diederik Verkest, Julio Leao da Silva Jr., Chantal Ykman-Couvreur, Kris Croes, Miguel Miranda, Sven Wuytack, Francky Catthoor, Gjalt G. de Jong, Hugo De Man: Matisse: A System-on-Chip Design Methodology Emphasizing Dynamic Memory Management. VLSI Signal Processing 21(3): 185-194 (1999)
- [c13]Dirk Desmet, Michiel Esvelt, Prabhat Avasare, Diederik Verkest, Hugo De Man: Timed executable system specification of an ADSL modem using a C++ based design environment: a case study. CODES 1999: 38-42
- [c12]Arnout Vandecappelle, Miguel Miranda, Erik Brockmeyer, Francky Catthoor, Diederik Verkest: Global Multimedia System Design Exploration Using Accurate Memory Organization Feedback. DAC 1999: 327-332
- [c11]Steven Vercauteren, Jan van der Steen, Diederik Verkest: Combining Software Synthesis and Hardware/Software Interface Generation to Meet Hard Real-Time Constraints. DATE 1999: 556-561
- [c10]Chantal Ykman-Couvreur, J. Lambrecht, Diederik Verkest, Francky Catthoor, Hugo De Man: Exploration and Synthesis of Dynamic Data Sets in Telecom Network Applications. ISSS 1999: 85-93
- 1998
- [c9]Julio Leao da Silva Jr., Chantal Ykman-Couvreur, Miguel Miranda, Kris Croes, Sven Wuytack, Gjalt G. de Jong, Francky Catthoor, Diederik Verkest, Paul Six, Hugo De Man: Efficient System Exploration and Synthesis of Applications with Dynamic Data Storage and Intensive Data Transfer. DAC 1998: 76-81
- [c8]Steven Vercauteren, Diederik Verkest, Gjalt G. de Jong, Bill Lin: Efficient Verification using Generalized Partial Order Analysis. DATE 1998: 782-789
- [c7]Julio Leao da Silva Jr., Francky Catthoor, Diederik Verkest, Hugo De Man: Power exploration for dynamic data types through virtual memory management refinement. ISLPED 1998: 311-316
- [c6]Francky Catthoor, Diederik Verkest, Erik Brockmeyer: Proposal for Unified System Design Meta Flow in Task-Level and Instruction-Level Design Technology Research for Multi-Media Applications. ISSS 1998: 89-95
- 1997
- [c5]Steven Vercauteren, Diederik Verkest, Gjalt G. de Jong, Bill Lin: Derivation of Formal Representations from Process-Based Specification and Implementation Models. ISSS 1997: 16-
- 1996
- [j3]Diederik Verkest, Karl van Rompaey, Ivo Bolsens, Hugo De Man: CoWare - A design environment for heterogeneous hardware/software systems. Design Autom. for Emb. Sys. 1(4): 357-386 (1996)
- 1994
- [j2]Diederik Verkest, Luc J. M. Claesen, Hugo De Man: A Proof of the Nonrestoring Division Algorithm and its Implementation on an ALU. Formal Methods in System Design 4(1): 5-31 (1994)
- 1993
- [j1]Catia M. Angelo, Diederik Verkest, Luc J. M. Claesen, Hugo De Man: On the Comparison of HOL and Boyer-Moore for Formal Hardware Verification. Formal Methods in System Design 2(1): 45-72 (1993)
- 1992
- [c4]Diederik Verkest, Luc J. M. Claesen, Hugo De Man: A Proof of the Non-Restoring Division Algorithm and its Implementation on the Cathedral-II ALU. Designing Correct Circuits 1992: 173-192
- [c3]Diederik Verkest, J. Vandenbergh, Luc J. M. Claesen, Hugo De Man: A Description Methodology for Parameterized Modules in the Boyer-Moore Logic. TPCD 1992: 37-57
- 1991
- [c2]Catia M. Angelo, Diederik Verkest, Luc J. M. Claesen, Hugo De Man: Formal Hardware Verification in HOL and in Boyer-Moore: A Comparative Analysis. TPHOLs 1991: 340-347
- 1990
- [c1]Diederik Verkest, Luc J. M. Claesen, Hugo De Man: Correctness proofs of parameterized hardware modules in the CATHEDRAL-II synthesis environment. EURO-DAC 1990: 62-66
Coauthor Index
[j30] [j28] [j27] [j26] [j25] [j24] [j21] [j19] [c67] [c66] [c64] [j15] [c63] [c62] [c61] [c60] [c59] [c57] [c56] [c55] [j13] [c54] [c53] [c50] [c49] [j11] [c45] [c43] [c42] [j9] [c38] [c37] [c35] [c32] [j8] [c31] [j7] [c25] [c23] [c22] [j6] [c21] [c20] [c17] [c16] [c15] [c14] [j5] [j4] [c12] [c10] [c9] [c7] [c6]
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last updated on 2013-05-28 21:38 CEST by the dblp team