| 2005 | ||
|---|---|---|
| c7 | Marco A. Ramírez, Adrián Cristal, Mateo Valero, Alexander V. Veidenbaum, Luis Villa: A New Pointer-based Instruction Queue Design and Its Power-Performance Evaluation. ICCD 2005: 647-653 | |
| 2004 | ||
| j3 | César A. Osuna-Gómez, Luis Mateus Rocha, Manuel Romero Salcedo, Luis Villa, Leonid Sheremetov, Olivia Niño: Using the APRI model for evaluating the intention in collaborative learning environments. Inteligencia Artificial, Revista Iberoamericana de Inteligencia Artificial 8(24): 109-119 (2004) | |
| j2 | Marco A. Ramírez, Adrián Cristal, Mateo Valero, Alexander V. Veidenbaum, Luis Villa: A partitioned instruction queue to reduce instruction wakeup energy. IJHPCN 1(4): 153-161 (2004) | |
| j1 | Manuel Romero Salcedo, César A. Osuna-Gómez, Leonid Sheremetov, Luis Villa, Carlos Morales, Luis Mateus Rocha, Manuel Chi: Study and analysis of workspace awareness in CDebate: a groupware application for collaborative debates. Interacting with Computers 16(4): 657-681 (2004) | |
| 2003 | ||
| c6 | Marco A. Ramírez, Adrián Cristal, Alexander V. Veidenbaum, Luis Villa, Mateo Valero: A Simple Low-Energy Instruction Wakeup Mechanism. ISHPC 2003: 99-112 | |
| 2000 | ||
| c5 | Luis Villa, Michael Zhang, Krste Asanovic: Dynamic zero compression for cache energy reduction. MICRO 2000: 214-220 | |
| 1998 | ||
| c4 | Luis Villa, Roger Espasa, Mateo Valero: A Performance Study of Out-of-order Vector Architectures and Short Registers. International Conference on Supercomputing 1998: 37-44 | |
| c3 | Luis Villa, Roger Espasa, Mateo Valero: Effective usage of vector registers in decoupled vector architectures. PDP 1998: 495-501 | |
| c2 | Luis Villa, Roger Espasa, Mateo Valero: Registers Size Influence on Vector Architectures. VECPAR 1998: 439-451 | |
| 1997 | ||
| c1 | Luis Villa, Roger Espasa, Mateo Valero: Effective Usage of Vector Registers in Advanced Vector Architectures. IEEE PACT 1997: 250-260 | |
Colors in the list of coauthors
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