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Janet Meiling Wang
Janet Meiling Wang Roveda
2010 – today
- 2012
[j14]Jin Sun, Rui Zheng, Jyothi Velamala, Yu Cao, Roman L. Lysecky, Karthik Shankar, Janet Meiling Wang Roveda: A self-tuning design methodology for power-efficient multi-core systems. ACM Trans. Design Autom. Electr. Syst. 18(1): 4 (2012)
[c51]Jin Sun, Priyank Gupta, Janet Meiling Wang Roveda: A new uncertainty budgeting based method for robust analog/mixed-signal design. DAC 2012: 529-535- 2011
[j13]Stojan Z. Denic, Bane V. Vasic, Charalambos D. Charalambous, Jifeng Chen, Janet Meiling Wang: Information Theoretic Modeling and Analysis for Global Interconnects With Process Variations. IEEE Trans. VLSI Syst. 19(3): 397-410 (2011)
[c50]Janet Meiling Wang Roveda, Susan Lysecky, Young-Jun Son, Hyungtaek Chang, Anita Annamalai, Xiao Qin: Interface model based cyber-physical energy system design for smart grid. VLSI-SoC 2011: 368-373
[e2]Janet Meiling Wang, Deming Chen (Eds.): 2011 International Workshop on System Level Interconnect Prediction, SLIP 2011, San Diego, CA, USA, June 5, 2011. IEEE 2011, ISBN 978-1-4577-1240-1- 2010
[j12]Jin Sun, Kiran Potluri, Janet Meiling Wang: Predicting Analog Circuit Performance Based on Importance of Uncertainties. IEICE Transactions 93-C(6): 893-904 (2010)
[j11]Alexander V. Mitev, Michael M. Marefat, Dongsheng Ma, Janet Meiling Wang: Principle Hessian Direction-Based Parameter Reduction for Interconnect Networks With Process Variation. IEEE Trans. VLSI Syst. 18(9): 1337-1347 (2010)
[c49]Jin Sun, Roman L. Lysecky, Karthik Shankar, Avinash Karanth Kodi, Ahmed Louri, Janet Meiling Wang: Workload capacity considering NBTI degradation in multi-core systems. ASP-DAC 2010: 450-455
[c48]Jin Sun, Rui Zheng, Jyothi Velamala, Yu Cao, Roman L. Lysecky, Karthik Shankar, Janet Meiling Wang Roveda: A self-evolving design methodology for power efficient multi-core systems. ICCAD 2010: 264-268
[c47]Jin Sun, Janet Meiling Wang: Robust gate sizing by Uncertainty Second Order Cone. ISQED 2010: 291-298
[e1]Sherief Reda, Janet Meiling Wang (Eds.): International Workshop on System Level Interconnect Prediction Workshop, SLIP 2010, Anaheim, CA, USA, June 13, 2010. ACM 2010, ISBN 978-1-4503-0037-7
2000 – 2009
- 2009
[j10]Omar Hafiz, Alexander V. Mitev, Janet Meiling Wang: A Linear Fractional Transform (LFT) Based Model for Interconnect Uncertainty. IEICE Transactions 92-A(4): 1148-1160 (2009)
[j9]Vineet Agarwal, Jin Sun, Janet Meiling Wang: Delay Uncertainty Reduction by Gate Splitting. IEEE Trans. on Circuits and Systems 56-II(4): 295-299 (2009)
[c46]Avinash Karanth Kodi, Ashwini Sarathy, Ahmed Louri, Janet Meiling Wang: Adaptive inter-router links for low-power, area-efficient and reliable Network-on-Chip (NoC) architectures. ASP-DAC 2009: 1-6
[c45]Jifeng Chen, Jin Sun, Janet Meiling Wang: Robust interconnect communication capacity algorithm by geometric programming. ISPD 2009: 19-26
[c44]Avinash Karanth Kodi, Ahmed Louri, Janet Meiling Wang: Design of energy-efficient channel buffers with router bypassing for network-on-chips (NoCs). ISQED 2009: 826-832
[c43]Jin Sun, Avinash Karanth Kodi, Ahmed Louri, Janet Meiling Wang: NBTI aware workload balancing in multi-core systems. ISQED 2009: 833-838- 2008
[j8]Alexander V. Mitev, Michael M. Marefat, Dongsheng Ma, Janet Meiling Wang: Parameter reduction for variability analysis by slice inverse regression method. IET Circuits, Devices & Systems 2(1): 16-22 (2008)
[j7]Uday Padmanabhan, Janet Meiling Wang, Jiang Hu: Robust Clock Tree Routing in the Presence of Process Variations. IEEE Trans. on CAD of Integrated Circuits and Systems 27(8): 1385-1397 (2008)
[j6]Jin Sun, Jun Li, Dongsheng Ma, Janet Meiling Wang: Chebyshev Affine-Arithmetic-Based Parametric Yield Prediction Under Limited Descriptions of Uncertainty. IEEE Trans. on CAD of Integrated Circuits and Systems 27(10): 1852-1865 (2008)
[j5]Kishore Kumar Muchherla, Pinhong Chen, Dongsheng Ma, Janet Meiling Wang: A noniterative equivalent waveform model for timing analysis in presence of crosstalk. ACM Trans. Design Autom. Electr. Syst. 13(2) (2008)
[c42]Jin Sun, Yue Huang, Jun Li, Janet Meiling Wang: Chebyshev Affine Arithmetic based parametric yield prediction under limited descriptions of uncertainty. ASP-DAC 2008: 531-536
[c41]Sridhar Varadan, Janet Meiling Wang, Jiang Hu: Handling partial correlations in yield prediction. ASP-DAC 2008: 543-548
[c40]Dinesh Ganesan, Alexander V. Mitev, Janet Meiling Wang, Yu Cao: Finite-Point Gate Model for Fast Timing and Power Analysis. ISQED 2008: 657-662- 2007
[c39]Alexander V. Mitev, Michael M. Marefat, Dongsheng Ma, Janet Meiling Wang: Parameter Reduction for Variability Analysis by Slice Inverse Regression (SIR) Method. ASP-DAC 2007: 468-473
[c38]Vineet Agarwal, Jin Sun, Alexander V. Mitev, Janet Meiling Wang: Delay Uncertainty Reduction by Interconnect and Gate Splitting. ASP-DAC 2007: 690-695
[c37]Alexander V. Mitev, Michael M. Marefat, Dongsheng Ma, Janet Meiling Wang: Principle Hessian direction based parameter reduction with process variation. ICCAD 2007: 632-637
[c36]Alexander V. Mitev, Dinesh Ganesan, Dheepan Shanmugasundaram, Yu Cao, Janet Meiling Wang: A robust finite-point based gate model considering process variations. ICCAD 2007: 692-697
[c35]Alexander V. Mitev, Michael M. Marefat, Dongsheng Ma, Janet Meiling Wang: Principle hessian direction based parameter reduction for interconnect networks with process variation. SLIP 2007: 41-46
[i3]Bharat Sukhwani, Uday Padmanabhan, Janet Meiling Wang: Nano-Sim: A Step Wise Equivalent Conductance based Statistical Simulator for Nanotechnology Circuit Design. CoRR abs/0710.4633 (2007)
[i2]Y. Satish Kumar, Jun Li, Claudio Talarico, Janet Meiling Wang: A Probabilistic Collocation Method Based Statistical Gate Delay Model Considering Process Variations and Multiple Input Switching. CoRR abs/0710.4634 (2007)
[i1]Praveen Ghanta, Sarma B. K. Vrudhula, Rajendran Panda, Janet Meiling Wang: Stochastic Power Grid Analysis Considering Process Variations. CoRR abs/0710.4649 (2007)- 2006
[j4]Sarma B. K. Vrudhula, Janet Meiling Wang, Praveen Ghanta: Hermite Polynomial Based Interconnect Analysis in the Presence of Process Variations. IEEE Trans. on CAD of Integrated Circuits and Systems 25(10): 2001-2011 (2006)
[j3]Janet Meiling Wang, Jun Li, Satish K. Yanamanamanda, Lakshmi Kalpana Vakati, Kishore Kumar Muchherla: Modeling the Driver Load in the Presence of Process Variations. IEEE Trans. on CAD of Integrated Circuits and Systems 25(10): 2264-2275 (2006)
[c34]Vineet Agarwal, Janet Meiling Wang: Yield-area optimizations of digital circuits using non-dominated sorting genetic algorithm (YOGA). ASP-DAC 2006: 718-723
[c33]Navneeth Kankani, Vineet Agarwal, Janet Meiling Wang: A probabilistic analysis of pipelined global interconnect under process variations. ASP-DAC 2006: 724-729
[c32]Dongsheng Ma, Janet Meiling Wang, Pablo Vazquas: Adaptive on-chip power supply with robust one-cycle control technique. ISLPED 2006: 394-399
[c31]Uday Padmanabhan, Janet Meiling Wang, Jiang Hu: Statistical clock tree routing for robustness to process variations. ISPD 2006: 149-156- 2005
[j2]Lakshmi Kalpana Vakati, Kishore Kumar Muchherla, Janet Meiling Wang: A New Three-Piece Driver Model with RLC Interconnect Load. IEICE Transactions 88-A(8): 2206-2215 (2005)
[j1]Yu-Min Lee, Yahong Cao, Tsung-Hao Chen, Janet Meiling Wang, Charlie Chung-Ping Chen: HiPRIME: hierarchical and passivity preserved interconnect macromodeling engine for RLKC power delivery. IEEE Trans. on CAD of Integrated Circuits and Systems 24(6): 797-806 (2005)
[c30]Vineet Agarwal, Navneeth Kankani, Ravishankar Rao, Sarvesh Bhardwaj, Janet Meiling Wang: An efficient combinationality check technique for the synthesis of cyclic combinational circuits. ASP-DAC 2005: 212-215
[c29]Prashant Saxena, Kumar N. Lalgudi, Hans J. Greub, Janet Meiling Wang Roveda: A perturbation-aware noise convergence methodology for high frequency microprocessors. ASP-DAC 2005: 717-722
[c28]Bharat B. Sukhwani, Uday Padmanabhan, Janet Meiling Wang: Nano-Sim: A Step Wise Equivalent Conductance based Statistical Simulator for Nanotechnology Circuit Design. DATE 2005: 758-763
[c27]Y. Satish Kumar, Jun Li, Claudio Talarico, Janet Meiling Wang: A Probabilistic Collocation Method Based Statistical Gate Delay Model Considering Process Variations and Multiple Input Switching. DATE 2005: 770-775
[c26]Praveen Ghanta, Sarma B. K. Vrudhula, Rajendran Panda, Janet Meiling Wang: Stochastic Power Grid Analysis Considering Process Variations. DATE 2005: 964-969
[c25]Rong Jiang, Wenyin Fu, Janet Meiling Wang, Vince Lin, Charlie Chung-Ping Chen: Efficient statistical capacitance variability modeling with orthogonal principle factor analysis. ICCAD 2005: 683-690
[c24]Janet Meiling Wang, Bharat Srinivas, Dongsheng Ma, Charlie Chung-Ping Chen, Jun Li: System-level power and thermal modeling and analysis by orthogonal polynomial based response surface approach (OPRS). ICCAD 2005: 728-735
[c23]Satish K. Yanamanamanda, Jun Li, Janet Meiling Wang: Uncertainty modeling of gate delay considering multiple input switching. ISCAS (3) 2005: 2457-2460
[c22]Kishore Kumar Muchherla, Pinhong Chen, Janet Meiling Wang: A non-iterative equivalent waveform model for timing analysis in presence of crosstalk. ISCAS (3) 2005: 2465-2468
[c21]Bharat B. Sukhwani, Janet Meiling Wang: A stepwise constant conductance approach for simulating resonant tunneling diodes. ISCAS (3) 2005: 2518-2521
[c20]Dongsheng Ma, Janet Meiling Wang, Mohankumar N. Somasundaram, Zongqi Hu: Design and optimization on dynamic power system for self-powered integrated wireless sensing nodes. ISLPED 2005: 303-306- 2004
[c19]Janet Meiling Wang, Prashant Saxena, Omar Hafiz, Xing Wang: Realizable parasitic reduction for distributed interconnects using matrix pencil technique. ASP-DAC 2004: 780-785
[c18]Janet Meiling Wang, Omar Hafiz, Pinhong Chen: A non-iterative model for switching window computation with crosstalk noise. ASP-DAC 2004: 846-851
[c17]Janet Meiling Wang, Omar Hafiz, Jun Li: A linear fractional transform (LFT) based model for interconnect parametric uncertainty. DAC 2004: 375-380
[c16]Sreeja Raj, Sarma B. K. Vrudhula, Janet Meiling Wang: A methodology to improve timing yield in the presence of process variations. DAC 2004: 448-453
[c15]Janet Meiling Wang, Praveen Ghanta, Sarma B. K. Vrudhula: Stochastic analysis of interconnect performance in the presence of process variations. ICCAD 2004: 880-886
[c14]Janet Meiling Wang, Omar Hafiz: Matrix pencil based realizable reduction for distributed interconnects. ISCAS (5) 2004: 177-180
[c13]Lakshmi Kalpana Vakati, Janet Meiling Wang: A new multi-ramp driver model with RLC interconnect load. ISCAS (5) 2004: 269-272
[c12]Omar Hafiz, Pinhong Chen, Janet Meiling Wang: A new non-iterative model for switching window computation with crosstalk noise. ISCAS (2) 2004: 497-500
[c11]Lakshmi Kalpana Vakati, Janet Meiling Wang: A new multi-ramp driver model with RLC interconnect load. ISPD 2004: 170-175
[c10]Janet Meiling Wang, Kishore Kumar Muchherla, Jai Ganesh Kumar: A Clustering Based Area I/O Planning for Flip-Chip Technology. ISQED 2004: 196-201
[c9]Janet Meiling Wang, Omar Hafiz: Predicting Interconnect Uncertainty with a New Robust Model Order Reduction Method. ISQED 2004: 363-368- 2003
[c8]Janet Meiling Wang, Pinhong Chen, Omar Hafiz: A New Continuous Switching Window Computation with Crosstalk Noise. SBCCI 2003: 261-266
[c7]Janet Meiling Wang, Pinhong Chen, Omar Hafiz: Switching Windows Computation in Presence of Crosstalk Noise. VLSI 2003: 114-118- 2000
[c6]Janet Meiling Wang, Tuyen V. Nguyen: Extended Krylov subspace method for reduced order analysis of linear circuits with multiple sources. DAC 2000: 247-252
[c5]Qingjian Yu, Janet Meiling Wang, Ernest S. Kuh: Passive model order reduction algorithm based on Chebyshev expansion of impulse response of interconnect networks. DAC 2000: 520-525
1990 – 1999
- 1999
[c4]Janet Meiling Wang, Qingjian Yu, Ernest S. Kuh: Coupled Noise Estimation for Distributed RC Interconnect Model. DATE 1999: 664-668
[c3]Janet Meiling Wang, Ernest S. Kuh, Qingjian Yu: The Chebyshev expansion based passive model for distributed interconnect networks. ICCAD 1999: 370-375- 1998
[c2]Qingjian Yu, Janet Meiling Wang, Ernest S. Kuh: Multipoint moment matching model for multiport distributed interconnect networks. ICCAD 1998: 85-91- 1996
[c1]Jun-Fa Mao, Janet Meiling Wang, Ernest S. Kuh: Simulation and sensitivity analysis of transmission line circuits by the characteristics method. ICCAD 1996: 556-562
Coauthor Index
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last updated on 2013-04-18 21:33 CEST by the dblp team



