Weihuang Wang

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	2009
j1		Weihuang Wang, Euncheol Kim, Kiran K. Gunnam, Gwan S. Choi: Low-Power VLSI Design of LDPC Decoder Using Dynamic Voltage and Frequency Scaling for Additive White Gaussian Noise Channels. J. Low Power Electronics 5(3): 303-312 (2009)
c5		Weihuang Wang, Gwan S. Choi, Kiran K. Gunnam: Low-Power VLSI Design of LDPC Decoder Using DVFS for AWGN Channels. VLSI Design 2009: 51-56
	2007
c4		Weihuang Wang, Gwan Choi: Minimum-energy LDPC decoder for real-time mobile application. DATE 2007: 343-348
c3		Pankaj Bhagawat, Weihuang Wang, Momin Uppal, Gwan Choi, Zixiang Xiong, Mark B. Yeary, Alan Harris: An FPGA Implementation of Dirty Paper Precoder. ICC 2007: 2761-2766
c2		Kiran K. Gunnam, Gwan Choi, Weihuang Wang, Mark B. Yeary: Multi-Rate Layered Decoder Architecture for Block LDPC Codes of the IEEE 802.11n Wireless Standard. ISCAS 2007: 1645-1648
c1		Weihuang Wang, Gwan Choi: Speculative Energy Scheduling for LDPC Decoding. ISQED 2007: 79-84

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