Ze-ke Wang

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	2011
j2		Xue Liu, Feng Yu, Ze-ke Wang: A pipelined architecture for normal I/O order FFT. Journal of Zhejiang University - Science C 12(1): 76-82 (2011)
j1		Zhen-guo Ma, Feng Yu, Rui-feng Ge, Ze-ke Wang: An efficient radix-2 fast Fourier transform processor with ganged butterfly engines on field programmable gate arrays. Journal of Zhejiang University - Science C 12(4): 323-329 (2011)

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