Jae-Kyung Wee

Ji-Hoon Lim, Won-Young Jung, Yong-Ju Kim, Inchae Song, Jae-Kyung Wee: A Digitally-Controlled SMPS Using a Novel High-Resolution DPWM Generator Based on a Pseudo Relaxation-Oscillation Technique. IEICE Transactions 96-C(2): 277-284 (2013)

Young San Shin, Seongsoo Lee, Jae-Kyung Wee: Current readout circuit using two-stage amplification method for 64-channel CNT arrays. ISCAS 2012: 854-857

Young San Shin, Jae-Kyung Wee, Jong-Chan Ha, Ji-Hoon Lim, Yong-Ju Kim, Young-Sang Son: A Seamless-Controlled Digital PLL Using Dual Loops for High Speed SoCs. Journal of Circuits, Systems, and Computers 20(4): 741-756 (2011)

Won-Young Jung, Hyungon Kim, Yong-Ju Kim, Jae-Kyung Wee: Novel Method of Interconnect Worstcase Establishment with Statistically-Based Approaches. IEICE Transactions 91-A(4): 1177-1184 (2008)

Ji-Hoon Lim, Jong-Chan Ha, Won-Young Jung, Yong-Ju Kim, Jae-Kyung Wee: A Novel High-Speed and Low-Voltage CMOS Level-Up/Down Shifter Design for Multiple-Power and Multiple-Clock Domain Chips. IEICE Transactions 90-C(3): 644-648 (2007)

Yong-Ju Kim, Won-Young Jung, Jae-Kyung Wee: Fast and Accurate Power Bus Designer for Multi-Layers High-Speed Digital Boards. IEICE Transactions 89-C(7): 1097-1105 (2006)

Seongsoo Lee, Min-Cheol Hong, Jae-Kyung Wee: Low-Hardware-Cost Motion Estimation with Large Search Range for VLSI Multimedia Processors. IEICE Transactions 88-D(9): 2177-2182 (2005)

Gang-Hoon Seo, Won-Yong Jung, Seongsoo Lee, Jae-Kyung Wee: Pipelined Bidirectional Bus Architecture for Embedded Multimedia SoCs. EUC 2005: 350-359

Yong-Ju Jang, Yoan Shin, Min-Cheol Hong, Jae-Kyung Wee, Seongsoo Lee: Low-Power 32bit×32bit Multiplier Design with Pipelined Block-Wise Shutdown. HiPC 2005: 398-406

Gyu-Sung Yeon, Chi-Hun Jun, Tae-Jin Hwang, Seongsoo Lee, Jae-Kyung Wee: Low-Power MPEG-4 Motion Estimator Design for Deep Sub-Micron Multimedia SoC. KES (3) 2005: 449-455

Gyu-Sung Yeon, Chi-Hun Jun, Tae-Jin Hwang, Seongsoo Lee, Jae-Kyung Wee: Low power motion estimator architecture with leakage power reduction in deep sub-micron SoC. Circuits, Signals, and Systems 2004: 85-89