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Ralph Weper
2000 – 2009
- 2003
[j1]Dirk Fischer, Jürgen Teich, Ralph Weper, Michael Thies: BUILDABONG: A Framework for Architecture/Compiler Co-Exploration for ASIPs. Journal of Circuits, Systems, and Computers 12(3): 353- (2003)- 2002
[c4]Dirk Fischer, Jürgen Teich, Michael Thies, Ralph Weper: Efficient architecture/compiler co-exploration for ASIPs. CASES 2002: 27-34- 2001
[c3]Dirk Fischer, Jürgen Teich, Ralph Weper, Uwe Kastens, Michael Thies: Design space characterization for architecture/compiler co-exploration. CASES 2001: 108-115- 2000
[c2]Jürgen Teich, Philipp W. Kutter, Ralph Weper: Description and Simulation of Microprocessor Instruction Sets Using ASMs. Abstract State Machines 2000: 266-286
[c1]Jürgen Teich, Ralph Weper, Dirk Fischer, Stefan Trinkert: A joined architecture/compiler design environment for ASIPs. CASES 2000: 26-33
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last updated on 2012-12-02 21:26 CET by the dblp team



