| 2013 | ||
|---|---|---|
| c13 | Edith Beigné, Alexandre Valentian, Bastien Giraud, Olivier Thomas, T. Benoist, Yvain Thonnart, S. Bernard, G. Moritz, O. Billoint, Y. Maneglia, Philippe Flatresse, Jean-Philippe Noel, Fady Abouzeid, Bertrand Pelloux-Prayer, A. Grover, Sylvain Clerc, Philippe Roche, Julien Le Coz, Sylvain Engels, Robin Wilson: Ultra-wide voltage range designs in fully-depleted silicon-on-insulator FETs. DATE 2013: 613-618 | |
| c12 | Philippe Flatresse, Bastien Giraud, Jean-Philippe Noel, Bertrand Pelloux-Prayer, Fabien Giner, Deepak-Kumar Arora, Franck Arnaud, Nicolas Planes, Julien Le Coz, Olivier Thomas, Sylvain Engels, Giorgio Cesana, Robin Wilson, Pascal Urard: Ultra-wide body-bias range LDPC decoder in 28nm UTBB FDSOI technology. ISSCC 2013: 424-425 | |
| 2010 | ||
| j6 | Nabila Moubdi, Philippe Maurine, Robin Wilson, Sylvain Engels, Nadine Azémard, Vincent Dumettier, Pierre Busson: On-Chip Process Variability Monitoring Flow. J. Low Power Electronics 6(4): 601-606 (2010) | |
| 2009 | ||
| j5 | V. Migairou, Robin Wilson, Sylvain Engels, Zequin Wu, Nadine Azémard, Philippe Maurine: Timing margin evaluation with a simple statistical timing analysis flow. J. Embedded Computing 3(3): 221-229 (2009) | |
| c11 | Nabila Moubdi, Philippe Maurine, Robin Wilson, Nadine Azémard, Vincent Dumettier, Abhishek Bansal, Sebastien Barasinski, Alain Tournier, Guy Durieu, David Meyer, Pierre Busson, Sarah Verhaeren, Sylvain Engels: Product On-Chip Process Compensation for Low Power and Yield Enhancement. PATMOS 2009: 247-255 | |
| 2007 | ||
| j4 | B. Lasbouygues, Robin Wilson, Nadine Azémard, Philippe Maurine: Temperature- and Voltage-Aware Timing Analysis. IEEE Trans. on CAD of Integrated Circuits and Systems 26(4): 801-815 (2007) | |
| c10 | B. Lasbouygues, Robin Wilson, Nadine Azémard, Philippe Maurine: Temperature and voltage aware timing analysis: application to voltage drops. DATE 2007: 1012-1017 | |
| c9 | V. Migairou, Robin Wilson, Sylvain Engels, Zequin Wu, Nadine Azémard, Philippe Maurine: A Simple Statistical Timing Analysis Flow and Its Application to Timing Margin Evaluation. PATMOS 2007: 138-147 | |
| 2006 | ||
| j3 | Sylvain Engels, Robin Wilson, Nadine Azémard, Philippe Maurine: A comprehensive performance macro-modeling of on-chip RC interconnects considering line shielding effects. Integration 39(4): 433-456 (2006) | |
| j2 | B. Lasbouygues, Sylvain Engels, Robin Wilson, Philippe Maurine, Nadine Azémard, Daniel Auvergne: Logical effort model extension to propagation delay representation. IEEE Trans. on CAD of Integrated Circuits and Systems 25(9): 1677-1684 (2006) | |
| c8 | B. Lasbouygues, Robin Wilson, Nadine Azémard, Philippe Maurine: Timing analysis in presence of supply voltage and temperature variations. ISPD 2006: 10-16 | |
| c7 | Arnaud Epinat, N. Vijayaraghavan, Matthieu Sautier, Olivier Callen, Sebastien Fabre, Ryan Ross, Paul Simon, Robin Wilson: Yield Enhancement Methodology for CMOS Standard Cells. ISQED 2006: 497-502 | |
| c6 | V. Migairou, Robin Wilson, Sylvain Engels, Nadine Azémard, Philippe Maurine: Statistical Characterization of Library Timing Performance. PATMOS 2006: 468-476 | |
| c5 | ||
| 2005 | ||
| j1 | Mario Diaz-Nava, Patrick Blouet, Philippe Teninge, Marcello Coppola, Tarek Ben Ismail, Samuel Picchiottino, Robin Wilson: An Open Platform for Developing Multiprocessor SoCs. IEEE Computer 38(7): 60-67 (2005) | |
| c4 | B. Lasbouygues, Robin Wilson, Nadine Azémard, Philippe Maurine: Temperature Dependency in UDSM Process. PATMOS 2005: 693-703 | |
| 2004 | ||
| c3 | B. Lasbouygues, Robin Wilson, Philippe Maurine, Nadine Azémard, Daniel Auvergne: Temperature Dependence in Low Power CMOS UDSM Process. PATMOS 2004: 110-118 | |
| c2 | B. Lasbouygues, Robin Wilson, Philippe Maurine, Nadine Azémard, Daniel Auvergne: Physical Extension of the Logical Effort Model. PATMOS 2004: 838-848 | |
| 2003 | ||
| c1 | Robin Wilson: Information Management and Interoperability Strategies: The Case for Digital Identifiers. ICWI 2003: 100-109 | |
Colors in the list of coauthors
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