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Michael J. Wirthlin
2010 – today
- 2013
[c39]Michael J. Wirthlin, Joshua E. Jensen, Alex Wilson, William Howes, Shi-Jie Wen, Rick Wong: Placement of repair circuits for in-field FPGA repair. FPGA 2013: 115-124- 2012
- [j13]Joshua S. Monson, Michael J. Wirthlin, Brad L. Hutchings: A Fault Injection Analysis of Linux Operating on an FPGA-Embedded Platform. Int. J. Reconfig. Comp. 2012 (2012)
- [c38]Nathaniel H. Rollins, Michael J. Wirthlin: Reliability of a softcore processor in a commercial SRAM-based FPGA. FPGA 2012: 171-174
- 2011
- [j12]Brian H. Pratt, Megan Fuller, Michael J. Wirthlin: Reduced-Precision Redundancy on FPGAs. Int. J. Reconfig. Comp. 2011 (2011)
- [c37]Nathaniel H. Rollins, Michael J. Wirthlin: Software Fault-Tolerant Techniques for Softcore Processors in Commercial SRAM-Based FPGAs. ARCS Workshops 2011
- [c36]Patrick S. Ostler, Michael J. Wirthlin, Joshua E. Jensen: FPGA Bootstrapping on PCIe Using Partial Reconfiguration. ReConFig 2011: 380-385
- [e1]Paul Chow, Michael J. Wirthlin (Eds.): IEEE 19th Annual International Symposium on Field-Programmable Custom Computing Machines, FCCM 2011, Salt Lake City, Utah, USA, 1-3 May 2011. IEEE Computer Society 2011
- 2010
- [c35]Shepard Siegel, Michael J. Wirthlin: FPGA-2010 pre-conference workshop on open-source for FPGA. FPGA 2010: 1
- [c34]Jonathan M. Johnson, Michael J. Wirthlin: Voter insertion algorithms for FPGA designs using triple modular redundancy. FPGA 2010: 249-258
- [c33]Christopher Lavin, Marc Padilla, Subhrashankha Ghosh, Brent E. Nelson, Brad L. Hutchings, Michael J. Wirthlin: Using Hard Macros to Reduce FPGA Compilation Time. FPL 2010: 438-441
- [c32]Adam Arnesen, Kevin Ellsworth, Derrick Gibelyou, Travis Haroldsen, Jared Havican, Marc Padilla, Brent E. Nelson, Michael Rice, Michael J. Wirthlin: Increasing Design Productivity through Core Reuse, Meta-data Encapsulation, and Synthesis. FPL 2010: 538-543
- [c31]Brian H. Pratt, Megan Fuller, Michael Rice, Michael J. Wirthlin: Reliable Communications Using FPGAs in High-Radiation Environments - Part I: Characterization. ICC 2010: 1-5
- [c30]Joshua S. Monson, Michael J. Wirthlin, Brad L. Hutchings: Fault Injection Results of Linux Operating on an FPGA Embedded Platform. ReConFig 2010: 37-42
2000 – 2009
- 2009
- [j11]Heather M. Quinn, Paul S. Graham, Michael J. Wirthlin, Brian H. Pratt, Keith Morgan, Michael P. Caffrey, Jim Krone: A Test Methodology for Determining Space Readiness of Xilinx SRAM-Based FPGA Devices and Designs. IEEE T. Instrumentation and Measurement 58(10): 3380-3395 (2009)
- [c29]Michael P. Caffrey, Keith Morgan, Diane Roussel-Dupre, Scott Robinson, Anthony Nelson, Anthony Salazar, Michael J. Wirthlin, William Howes, Daniel Richins: On-Orbit Flight Results from the Reconfigurable Cibola Flight Experiment Satellite (CFESat). FCCM 2009: 3-10
- [c28]Brian H. Pratt, Michael J. Wirthlin, Michael P. Caffrey, Paul S. Graham, Keith Morgan: Noise impact of single-event upsets on an FPGA-based digital filter. FPL 2009: 38-43
- [c27]Jonathan Heiner, Benjamin Sellers, Michael J. Wirthlin, Jeff Kalb: FPGA partial reconfiguration via configuration scrubbing. FPL 2009: 99-104
- [c26]Adam Arnesen, Nathan Rollins, Michael J. Wirthlin: A multi-layered XML schema and design tool for reusing and integrating FPGA IP. FPL 2009: 472-475
- [c25]Benjamin Sellers, Jonathan Heiner, Michael J. Wirthlin, Jeff Kalb: Bitstream compression through frame removal and partial reconfiguration. FPL 2009: 476-480
- 2008
- [j10]Michael J. Wirthlin, Daniel S. Poznanovic, P. Sundararajan, Alan J. Coppola, D. Pellerin, Walid A. Najjar, R. Bruce, M. Babst, O. Pritchard, Paolo Palazzari, Georgi Kuzmanov: OpenFPGA CoreLib core library interoperability effort. Parallel Computing 34(4-5): 231-244 (2008)
- [j9]Michael J. Wirthlin, Daniel S. Poznanovic, P. Sundararajan, Alan J. Coppola, D. Pellerin, Walid A. Najjar, R. Bruce, M. Babst, O. Pritchard, Paolo Palazzari, Georgi Kuzmanov: OpenFPGA CoreLib core library interoperability effort. Parallel Computing 34(4-5): 231-244 (2008)
- [j8]Brent E. Nelson, Brad L. Hutchings, Michael J. Wirthlin: Design, Debug, Deploy: The Creation of Configurable Computing Applications. Signal Processing Systems 53(1-2): 187-196 (2008)
- [c24]Brent E. Nelson, Michael J. Wirthlin, Brad L. Hutchings, Peter M. Athanas, Shawn Bohner: Design Productivity for Configurable Computing. ERSA 2008: 57-66
- [c23]Heather Quinn, Paul S. Graham, Keith Morgan, Jim Krone, Michael P. Caffrey, Michael J. Wirthlin: An Introduction to Radiation-Induced Failure Modes and Related Mitigation Methods For Xilinx SRAM FPGAs. ERSA 2008: 139-145
- [c22]Brian H. Pratt, Michael P. Caffrey, Derrick Gibelyou, Paul S. Graham, Keith Morgan, Michael J. Wirthlin: TMR with More Frequent Voting for Improved FPGA Reliability. ERSA 2008: 153-158
- 2007
- [j7]Welson Sun, Michael J. Wirthlin, Stephen Neuendorffer: FPGA Pipeline Synthesis Design Exploration Using Module Selection and Resource Sharing. IEEE Trans. on CAD of Integrated Circuits and Systems 26(2): 254-265 (2007)
- [c21]Michael J. Wirthlin, Misha Burich, Andrew Guyler, Brian Von Herzen: High-level languages: the future or a passing fad? FPGA 2007: 127
- 2006
- [j6]Maya Gokhale, Paul S. Graham, Michael J. Wirthlin, Darrel Eric Johnson, Nathan Rollins: Dynamic reconfiguration for management of radiation-induced faults in FPGAs. IJES 2(1/2): 28-38 (2006)
- [c20]Matthew French, Li Wang, Michael J. Wirthlin: Power Visualization, Analysis, and Optimization Tools for FPGAs. FCCM 2006: 185-194
- [c19]Michael J. Wirthlin, Welson Sun: DSynth: A Pipeline Synthesis Environment for FPGAs. FCCM 2006: 343-344
- [c18]Welson Sun, Michael J. Wirthlin, Stephen Neuendorffer: Combining module selection and resource sharing for efficient FPGA pipeline synthesis. FPGA 2006: 179-188
- 2005
- [c17]Matthew French, Li Wang, Tyler Anderson, Michael J. Wirthlin: Post Synthesis Level Power Modeling of FPGAs. FCCM 2005: 281-282
- [c16]Toomas P. Plaks, Philip Leong, Michael J. Wirthlin: Mobile Computing Architectures, Design and Implementation. HICSS 2005
- [c15]
- 2004
- [j5]Michael J. Wirthlin: Constant Coefficient Multiplication Using Look-Up Tables. VLSI Signal Processing 36(1): 7-15 (2004)
- [c14]Michael J. Wirthlin: Improving the reliability of FPGA circuits using triple-modular redundancy (TMR) & efficient voter placement. FPGA 2004: 252
- [c13]Maya Gokhale, Paul S. Graham, Darrel Eric Johnson, Nathan Rollins, Michael J. Wirthlin: Dynamic Reconfiguration for Management of Radiation-Induced Faults in FPGAs. IPDPS 2004
- 2003
- [j4]Edward A. Lee, Stephen Neuendorffer, Michael J. Wirthlin: Actor-Oriented Design of Embedded Hardware and Software Systems. Journal of Circuits, Systems, and Computers 12(3): 231-260 (2003)
- [j3]Michael J. Wirthlin, Brian McMurtrey: Web-based IP evaluation and distribution using applets. IEEE Trans. on CAD of Integrated Circuits and Systems 22(8): 985-994 (2003)
- [c12]Michael J. Wirthlin, Darrel Eric Johnson, Nathan Rollins, Michael P. Caffrey, Paul S. Graham: The Reliability of FPGA Circuit Designs in the Presence of Radiation Induced Configuration Upsets. FCCM 2003: 133-142
- 2002
- [c11]
- [c10]Wesley J. Landaker, Michael J. Wirthlin, Brad L. Hutchings: Multitasking Hardware on the SLAAC1-V Reconfigurable Computing System. FPL 2002: 806-815
- 2001
- [c9]Michael J. Wirthlin, Brad L. Hutchings, Carl Worth: Synthesizing RTL Hardware from Java Byte Codes. FPL 2001: 123-132
- [c8]Michael J. Wirthlin, Brian McMurtrey: Efficient Constant Coefficient Multiplication Using Advanced FPGA Architectures. FPL 2001: 555-564
- 2000
- [j2]Brad L. Hutchings, Brent E. Nelson, Michael J. Wirthlin: Designing and Debugging Custom Computing Applications. IEEE Design & Test of Computers 17(1): 20-28 (2000)
- [c7]Michael J. Wirthlin, Steve Morrison, Paul S. Graham, Brian Bray: Improving the Performance and Efficiency of an Adaptive Amplification Operation Using Configurable Hardware. FCCM 2000: 267-278
- [c6]Michael J. Wirthlin, Paul S. Graham: Improving the performance and efficiency of an adaptive amplification operation using configurable hardware (poster abstract). FPGA 2000: 219
- [c5]Michael J. Wirthlin, Navaneethan Sundaramoorthy: Measuring the Routing Costs of FPGA Circuit Components. PDPTA 2000
1990 – 1999
- 1998
- [j1]Michael J. Wirthlin, Brad L. Hutchings: Improving functional density using run-time circuit reconfiguration [FPGAs]. IEEE Trans. VLSI Syst. 6(2): 247-256 (1998)
- 1997
- [c4]Michael J. Wirthlin, Brad L. Hutchings: Improving Functional Density Through Run-Time Constant Propagation. FPGA 1997: 86-92
- 1996
- [c3]Michael J. Wirthlin, Brad L. Hutchings: Sequencing Run-Time Reconfigured Hardware with Software. FPGA 1996: 122-128
- 1995
- [c2]
- [c1]Brad L. Hutchings, Michael J. Wirthlin: Implementation Approaches for Reconfigurable Logic Applications. FPL 1995: 419-428
Coauthor Index
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last updated on 2013-05-17 21:55 CEST by the dblp team