Chuan-lin Wu

W. Lynn Gallagher, Chuan-lin Wu: Evaluation of a memory hierarchy for the MTS multithreaded processor. ICPADS 1997: 346-351

Chao Chi Tong, Chuan-lin Wu: Routing in a Three-Dimensional Chip. IEEE Trans. Computers 44(1): 106-117 (1995)

Jin Li, Chuan-lin Wu: A modular growth architecture for an ATM switch. ICCCN 1995: 420

Jin Li, Chuan-lin Wu: A novel architecture for an ATM switch. ICCD 1995: 340-345

Jin Li, Chuan-lin Wu: Design and implementation of a multicast-buffer ATM switch. ICNP 1995: 84-91

Dz-Ching Ju, Chuan-lin Wu, Paul R. Carini: The Classification, Fusion, and Parallelization of Array Language Primitives. IEEE Trans. Parallel Distrib. Syst. 5(10): 1113-1120 (1994)

Hsiao-chen Chung, Chuan-lin Wu, James Rakes, Peter J. Zievers, Yin-Kuan Lin: Design and Evaluation of a Multiprocessor Architecture with Decentralized Control. ICPP (1) 1994: 97-100

Dz-Ching Ju, Chuan-lin Wu, Paul R. Carini: Statement Merge: an Inter-Statement Optimization of Array Language Programs. ICPP 1994: 126-129

Avijit Saha, Chuan-lin Wu, Dun-Sung Tang: Approximation, Dimension Reduction, and Nonconvex Optimization Using Linear Superpositions of Gaussians. IEEE Trans. Computers 42(10): 1222-1233 (1993)

Yi-Hsiu Wei, Chuan-lin Wu: Integrating RPC and Message Passing for Distributed Programming. DCE Workshop 1993: 192-206

Terence M. Potter, Hsiao-chen Chung, Chuan-lin Wu: Reconfigurable Branch Processing Strategy in Super-Scalar Microprocessors. ICPP 1993: 47-50

Chuan-lin Wu, Manjai Lee: Performance Analysis of Multistage Interconnection Network Configurations and Operations. IEEE Trans. Computers 41(1): 18-27 (1992)

Dz-Ching Ju, Chuan-lin Wu, Paul R. Carini: The Synthesis of Array Functions and Its Use in Parallel Computation. ICPP (2) 1992: 293-296

Thang Tran, Chuan-lin Wu: Limitation of superscalar microprocessor performance. MICRO 1992: 33-36

Lingtao Wang, Chuan-lin Wu: Distributed Instruction Set Computer Architecture. IEEE Trans. Computers 40(8): 915-934 (1991)

Nader Bagherzadeh, Seng-lai Heng, Chuan-lin Wu: A Parallel Asynchronous Garbage Collection Algorithm for Distributed Systems. IEEE Trans. Knowl. Data Eng. 3(1): 100-107 (1991)

Albert C. Chen, Chuan-lin Wu: A Parallel Execution Model of Logic Programs. IEEE Trans. Parallel Distrib. Syst. 2(1): 79-92 (1991)

Dz-Ching Ju, Wai-Mee Ching, Chuan-lin Wu: On Performance and Space Usage Improvements for Parallelized Compiled APL Code. APL 1991: 234-243

R. Guru Prasadh, Chuan-lin Wu: A Benchmark Evaluation of a Multi-threaded RISC Processor Architecture. ICPP (1) 1991: 84-91

Thang Tran, Chuan-lin Wu: Microprocessor Architecture with Multi-Bit Scoreboard Concurrency Control. ICPP (1) 1991: 128-135

Avijit Saha, Jim Christian, Dun-Sung Tang, Chuan-lin Wu: Oriented Non-Radial Basis Functions for Image Coding and Analysis. NIPS 1990: 728-734

Woei Lin, Chuan-lin Wu: A Fault-Tolerant Mapping Scheme for a Configurable Multiprocessor System. IEEE Trans. Computers 38(2): 227-237 (1989)

Geoffrey M. Brown, Mohamed G. Gouda, Chuan-lin Wu: Token Systems that Self-Stabilize. IEEE Trans. Computers 38(6): 845-852 (1989)

Woei Lin, Tsang-Ling Sheu, Chita R. Das, Tse-Yun Feng, Chuan-lin Wu: A Conflict-Free Routing Scheme on Multistage Interconnection Networks. IEEE Trans. Computers 38(8): 1086-1097 (1989)

Woei Lin, Chuan-lin Wu: A Distributed Resource Management Mechanism for a Partitionable Multiprocessor System. IEEE Trans. Computers 37(2): 201-210 (1988)

Chung-Yang Chiang, Chuan-lin Wu: Adaptive Checkpointing and Rollback in Multiprocessor Systems. ICPP (1) 1988: 400-403

Lingtao Wang, Chuan-lin Wu: Distributed Instruction Set Computer. ICPP (1) 1988: 426-429

Lingtao Wang, Chuan-lin Wu: I-NET mechanism for issuing multiple instructions. SC 1988: 88-95

Woei Lin, Chuan-lin Wu: Reconfiguration Procedures for a Polymorphic and Partitionable Multiprocessor. IEEE Trans. Computers 35(10): 910-916 (1986)

Geoffrey M. Brown, Chuan-lin Wu: Operating System Kernel for a Reconfigurable Multiprocessor System. ICPP 1986: 234-241

Chung-Yang Chiang, Chuan-lin Wu: Fail Safe Distributed Fault Diagnosis of Multiprocessor Systems. ICPP 1986: 358-365

Karam Mossaad, Chuan-lin Wu: Efficient Execution of Programs with Pipeline Configuration of Reconfigurable Multiprocessor. ICPP 1986: 552-554

Chuan-lin Wu: Multiprocessing Technology - Guest Editor's Introduction. IEEE Computer 18(6): 6-7 (1985)

Manjai Lee, Eric Fiene, Chuan-lin Wu, Geoffrey Brown, Nader Bagherzadeh: Network Facility for a Reconfigurable Computer Architecture. ICDCS 1985: 264-271

Woei Lin, Chuan-lin Wu: Design of Configuration Algorithms of Commonly-Used Topologies for a Multiprocessor : STAR. ICPP 1985: 734-741

Chuan-lin Wu, Tse-Yun Feng: Interconnection networks for parallel and distributed processing - tutorial. IEEE 1984, pp. I-VIII, 1-647

Manjai Lee, Chuan-lin Wu: Performance Analysis of Circuit Switching Baseline Interconnection Networks. ISCA 1984: 82-90

Woei Lin, Chuan-lin Wu: Configuring Computation Tree Topologies on a Distributed Computing System. ICPP 1983: 114-116

Chuan-lin Wu, Tse-Yun Feng, Min-Chang Lin: Star: A Local Network System for Real-Time Management of Imagery Data. IEEE Trans. Computers 31(10): 923-933 (1982)

Chuan-lin Wu: DDBC - A Distributed Database Computer for Very Large Data Base Management. COMPCON 1982: 24-27

Chuan-lin Wu, Woei Lin, Min-Chang Lin: Distributed circuit switching starnet. ICPP 1982: 26-33

Woei Lin, Chuan-lin Wu: Design of a 2 × 2 fault-tolerant switching element. ISCA 1982: 181-189

Chuan-lin Wu: Interconnection Networks - Guest Editor's Introduction. IEEE Computer 14(12): 8-9 (1981)

Chuan-lin Wu, Tse-Yun Feng: The Universality of the Shuffle-Exchange Network. IEEE Trans. Computers 30(5): 324-332 (1981)

Tse-Yun Feng, Chuan-lin Wu: Fault-Diagnosis for a Class of Multistage Interconnection Networks. IEEE Trans. Computers 30(10): 743-758 (1981)

Chuan-lin Wu, Tse-Yun Feng: On a Class of Multistage Interconnection Networks. IEEE Trans. Computers 29(8): 694-702 (1980)

Chuan-lin Wu, Tse-Yun Feng: The Reverse-Exchange Interconnection Network. IEEE Trans. Computers 29(9): 801-811 (1980)

Tse-Yun Feng, Chuan-lin Wu, Dharma P. Agrawal: A Microprocessor-Controlled Asynchronous Circuit Switching Network. ISCA 1979: 202-215