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Qiang Xu
2010 – today
- 2014
[b1]Xiao Liu, Qiang Xu: Trace-Based Post-Silicon Validation for VLSI Circuits. Lecture Notes in Electrical Engineering 252, Springer 2014, ISBN 978-3-319-00532-4, pp. 1-102- 2013
- [j36]Chuanyu Zhao, Jie Fu, Qiang Xu: Production-ratio oriented optimization for multi-recipe material handling via simultaneous hoist scheduling and production line arrangement. Computers & Chemical Engineering 50: 28-38 (2013)
- [j35]Tianxing Cai, Sujing Wang, Qiang Xu: Scheduling of multiple chemical plant start-ups to minimize regional air quality impacts. Computers & Chemical Engineering 54: 68-78 (2013)
- [j34]Chaojun Ouyang, Siming He, Qiang Xu, Yu Luo, Wencheng Zhang: A MacCormack-TVD finite difference method to simulate the mass flow in mountainous terrain with variable computational domain. Computers & Geosciences 52: 1-10 (2013)
- [j33]Li Jiang, Qiang Xu, Bill Eklow: On Effective Through-Silicon Via Repair for 3-D-Stacked ICs. IEEE Trans. on CAD of Integrated Circuits and Systems 32(4): 559-571 (2013)
- [j32]Xiao Liu, Qiang Xu: On Multiplexed Signal Tracing for Post-Silicon Validation. IEEE Trans. on CAD of Integrated Circuits and Systems 32(5): 748-759 (2013)
- [c96]
- [c95]Jie Zhang, Feng Yuan, Lingxiao Wei, Zelong Sun, Qiang Xu: VeriTrust: verification for hardware trust. DAC 2013: 61
- [c94]Li Jiang, Fangming Ye, Qiang Xu, Krishnendu Chakrabarty, Bill Eklow: On effective and efficient in-field TSV repair for stacked 3D ICs. DAC 2013: 74
- [c93]Rong Ye, Feng Yuan, Zelong Sun, Wen-Ben Jone, Qiang Xu: Post-placement voltage island generation for timing-speculative circuits. DAC 2013: 112
- [c92]
- [c91]Yinhe Han, Song Jin, Jibing Qiu, Qiang Xu, Xiaowei Li: On predicting NBTI-induced circuit aging by isolating leakage change. ISQED 2013: 46-52
- 2012
- [j31]Meiqian Wang, Jian Zhang, Qiang Xu: Optimal design and operation of a C3MR refrigeration system for natural gas liquefaction. Computers & Chemical Engineering 39: 84-95 (2012)
- [j30]Jie Fu, Tianxing Cai, Qiang Xu: Coupling multiple water-reuse network designs for agile manufacturing. Computers & Chemical Engineering 45: 62-71 (2012)
- [j29]Zhe Yin, Ziwen Jiang, Qiang Xu: A Discontinuous Finite Volume Method for the Darcy-Stokes Equations. J. Applied Mathematics 2012 (2012)
- [j28]Xiao Liu, Qiang Xu: On Signal Selection for Visibility Enhancement in Trace-Based Post-Silicon Validation. IEEE Trans. on CAD of Integrated Circuits and Systems 31(8): 1263-1274 (2012)
- [j27]Xiao Liu, Qiang Xu: On X-Variable Filling and Flipping for Capture-Power Reduction in Linear Decompressor-Based Test Compression Environment. IEEE Trans. on CAD of Integrated Circuits and Systems 31(11): 1743-1753 (2012)
- [j26]Li Jiang, Qiang Xu, Krishnendu Chakrabarty, T. M. Mak: Integrated Test-Architecture Optimization and Thermal-Aware Test Scheduling for 3-D SoCs Under Pre-Bond Test-Pin-Count Constraint. IEEE Trans. VLSI Syst. 20(9): 1621-1633 (2012)
- [j25]Haile Yu, Philip Heng Wai Leong, Qiang Xu: An FPGA Chip Identification Generator Using Configurable Ring Oscillators. IEEE Trans. VLSI Syst. 20(12): 2198-2207 (2012)
- [c90]Rong Ye, Qiang Xu: Learning-based power management for multi-core processors via idle period manipulation. ASP-DAC 2012: 115-120
- [c89]Yubin Zhang, Haile Yu, Qiang Xu: CODA: A concurrent online delay measurement architecture for critical paths. ASP-DAC 2012: 169-174
- [c88]Qiang Xu, Li Jiang, Huiyun Li, Bill Eklow: Yield enhancement for 3D-stacked ICs: Recent advances and challenges. ASP-DAC 2012: 731-737
- [c87]
- [c86]
- [c85]
- [c84]Jiancong Fan, Qiang Xu, Yongquan Liang: Analysis of classification learning based on estimation of distribution algorithms. FSKD 2012: 855-859
- [c83]
- [c82]Yuxi Liu, Rong Ye, Feng Yuan, Rakesh Kumar, Qiang Xu: On logic synthesis for timing speculation. ICCAD 2012: 591-596
- [c81]
- [c80]
- 2011
- [j24]Jian Zhang, Qiang Xu: Cascade refrigeration system synthesis based on exergy analysis. Computers & Chemical Engineering 35(9): 1901-1914 (2011)
- [j23]Chaowei Liu, Jie Fu, Qiang Xu: Simultaneous mixed-integer dynamic optimization for environmentally benign electroplating. Computers & Chemical Engineering 35(11): 2411-2425 (2011)
- [j22]Bocheng Bao, Zhenghua Ma, Jianping Xu, Zhong Liu, Qiang Xu: A Simple memristor Chaotic Circuit with Complex Dynamics. I. J. Bifurcation and Chaos 21(9): 2629-2645 (2011)
- [j21]Jiancong Fan, Yongquan Liang, Qiang Xu, Ruisheng Jia, Zhihua Cui: EDA-USL: unsupervised clustering algorithm based on estimation of distribution algorithm. IJWMC 5(1): 88-97 (2011)
- [j20]Jia Li, Xiao Liu, Yubin Zhang, Yu Hu, Xiaowei Li, Qiang Xu: Capture-power-aware test data compression using selective encoding. Integration 44(3): 205-216 (2011)
- [j19]Wei Liao, Jurong Ding, Daniele Marinazzo, Qiang Xu, Zhengge Wang, Cuiping Yuan, Zhiqiang Zhang, Guangming Lu, Huafu Chen: Small-world directed networks in the human brain: Multivariate Granger causality analysis of resting-state fMRI. NeuroImage 54(4): 2683-2694 (2011)
- [j18]Qiang Xu, Qiuwen Chen, Weifeng Li, Jinfeng Ma: Pipe break prediction based on evolutionary data-driven methods with brief recorded data. Rel. Eng. & Sys. Safety 96(8): 942-948 (2011)
- [j17]Lin Huang, Feng Yuan, Qiang Xu: On Task Allocation and Scheduling for Lifetime Extension of Platform-Based MPSoC Designs. IEEE Trans. Parallel Distrib. Syst. 22(12): 2088-2099 (2011)
- [c79]Jia Li, Qiang Xu, Dong Xiang: Compression-aware capture power reduction for at-speed testing. ASP-DAC 2011: 806-811
- [c78]Peter Marwedel, Jürgen Teich, Georgia Kouveli, Iuliana Bacivarov, Lothar Thiele, Soonhoi Ha, Chanhee Lee, Qiang Xu, Lin Huang: Mapping of applications to MPSoCs. CODES+ISSS 2011: 109-118
- [c77]
- [c76]
- [c75]
- [c74]Feng Yuan, Xiao Liu, Qiang Xu: On High-Quality Test Pattern Selection and Manipulation. European Test Symposium 2011: 218
- [c73]Haile Yu, Qiang Xu, Philip Heng Wai Leong: On timing yield improvement for FPGA designs using architectural symmetry (abstract only). FPGA 2011: 278
- [c72]Haile Yu, Qiang Xu, Philip Heng Wai Leong: On Timing Yield Improvement for FPGA Designs Using Architectural Symmetry. FPL 2011: 539-544
- [c71]Feng Yuan, Xiao Liu, Qiang Xu: Pseudo-functional testing for small delay defects considering power supply noise effects. ICCAD 2011: 34-39
- [c70]
- [c69]Qiang Xu, Chulin Jiang, Dezheng Liu, Yongxin Pang, Simon Hodgson: Finite element investigation of nano-indentation of coated stainless steel. ICAC 2011: 172-176
- [c68]Qiang Xu, Mark Wright, Qihua Xu: The development and validation of multi-axial creep damage constitutive equations for P91. ICAC 2011: 177-182
- [c67]Qiang Xu, Jeffrey Erman, Alexandre Gerber, Zhuoqing Morley Mao, Jeffrey Pang, Shobha Venkataraman: Identifying diverse usage behaviors of smartphone apps. Internet Measurement Conference 2011: 329-344
- [c66]Qiang Xu, Alexandre Gerber, Zhuoqing Morley Mao, Jeffrey Pang: AccuLoc: practical localization of performance measurements in 3G networks. MobiSys 2011: 183-196
- [c65]Zhaoguang Wang, Zhiyun Qian, Qiang Xu, Zhuoqing Morley Mao, Ming Zhang: An untold story of middleboxes in cellular networks. SIGCOMM 2011: 374-385
- [c64]Qiang Xu, Junxian Huang, Zhaoguang Wang, Feng Qian, Alexandre Gerber, Zhuoqing Morley Mao: Cellular data network infrastructure characterization and implication on mobile content placement. SIGMETRICS 2011: 317-328
- 2010
- [j16]Chaowei Liu, Jian Zhang, Qiang Xu, Kuyen Li: Cyclic scheduling for best profitability of industrial cracking furnace system. Computers & Chemical Engineering 34(4): 544-554 (2010)
- [j15]Lin Huang, Qiang Xu: Economic Analysis of Testing Homogeneous Manycore Chips. IEEE Trans. on CAD of Integrated Circuits and Systems 29(8): 1257-1270 (2010)
- [j14]Lin Huang, Qiang Xu: Lifetime Reliability for Load-Sharing Redundant Systems With Arbitrary Failure Distributions. IEEE Transactions on Reliability 59(2): 319-330 (2010)
- [j13]Jia Li, Qiang Xu, Yu Hu, Xiaowei Li: X-Filling for Simultaneous Shift- and Capture-Power Reduction in At-Speed Scan-Based Testing. IEEE Trans. VLSI Syst. 18(7): 1081-1092 (2010)
- [c63]
- [c62]Xiao Liu, Qiang Xu: On Signal Tracing for Debugging Speedpath-Related Electrical Errors in Post-Silicon Validation. Asian Test Symposium 2010: 243-248
- [c61]
- [c60]
- [c59]Xiao Liu, Yubin Zhang, Feng Yuan, Qiang Xu: Layout-aware pseudo-functional testing for critical paths considering power supply noise effects. DATE 2010: 1432-1437
- [c58]
- [c57]Haile Yu, Qiang Xu, Philip Heng Wai Leong: Fine-grained characterization of process variation in FPGAs. FPT 2010: 138-145
- [c56]Haile Yu, Philip Heng Wai Leong, Qiang Xu: An FPGA chip identification generator using configurable ring oscillator. FPT 2010: 312-315
- [c55]Xiaohua Chen, Qiang Xu: Military Information Grid-based Integrated Photo-electric Detector Technology. GCC 2010: 416-419
- [c54]Li Jiang, Rong Ye, Qiang Xu: Yield enhancement for 3D-stacked memory by redundancy sharing across dies. ICCAD 2010: 230-234
- [c53]
- [c52]Lin Huang, Qiang Xu: Characterizing the lifetime reliability of manycore processors with core-level redundancy. ICCAD 2010: 680-685
- [c51]
- [c50]Qiang Xu, Jaspal Subhlok, Nathaniel Hammen: Efficient Discovery of Loop Nests in Execution Traces. MASCOTS 2010: 193-202
- [c49]Junxian Huang, Qiang Xu, Birjodh Tiwana, Zhuoqing Morley Mao, Ming Zhang, Paramvir Bahl: Anatomizing application performance differences on smartphones. MobiSys 2010: 165-178
2000 – 2009
- 2009
- [j12]Dong Xiang, Dianwei Hu, Qiang Xu, Alex Orailoglu: Low-Power Scan Testing for Test Data Compression Using a Routing-Driven Scan Architecture. IEEE Trans. on CAD of Integrated Circuits and Systems 28(7): 1101-1105 (2009)
- [j11]Qiang Xu, Yubin Zhang, Krishnendu Chakrabarty: SOC test-architecture optimization for the testing of embedded cores and signal-integrity faults on core-external interconnects. ACM Trans. Design Autom. Electr. Syst. 14(1) (2009)
- [j10]Lei Zhang, Yinhe Han, Qiang Xu, Xiaowei Li, Huawei Li: On Topology Reconfiguration for Defect-Tolerant NoC-Based Homogeneous Manycore Systems. IEEE Trans. VLSI Syst. 17(9): 1173-1186 (2009)
- [c48]Yubin Zhang, Lin Huang, Feng Yuan, Qiang Xu: Test Pattern Selection for Potentially Harmful Open Defects in Power Distribution Networks. Asian Test Symposium 2009: 456-461
- [c47]
- [c46]
- [c45]
- [c44]
- [c43]
- [c42]
- [c41]Jing Li, Jian-yun Chen, Qiang Xu: The Improved Fuzzy Classification Model on Disaster Loss. FSKD (4) 2009: 409-412
- [c40]Qiang Xu, Jing Li, Jian-yun Chen: Fuzzy Reliability Analysis of Deep Sliding Plane in Rock Foundation under Dam. FSKD (6) 2009: 525-529
- [c39]Li Jiang, Qiang Xu, Krishnendu Chakrabarty, T. M. Mak: Layout-driven test-architecture design and optimization for 3D SoCs under pre-bond test-pin-count constraint. ICCAD 2009: 191-196
- [c38]Qiang Xu, Jaspal Subhlok, Rong Zheng, Sara Voss: Logicalization of communication traces from parallel execution. IISWC 2009: 34-43
- [c37]
- [c36]
- [c35]
- [c34]
- 2008
- [j9]Sukhdeep Sodhi, Jaspal Subhlok, Qiang Xu: Performance prediction with skeletons. Cluster Computing 11(2): 151-165 (2008)
- [j8]Jing-Ling Yang, Qiang Xu: State-Sensitive X-Filling Scheme for Scan Capture Power Reduction. IEEE Trans. on CAD of Integrated Circuits and Systems 27(7): 1338-1343 (2008)
- [c33]Shan Tang, Qiang Xu: A debug probe for concurrently debugging multiple embedded cores and inter-core transactions in NoC-based systems. ASP-DAC 2008: 416-421
- [c32]Jia Li, Qiang Xu, Yu Hu, Xiaowei Li: On reducing both shift and capture power for scan-based testing. ASP-DAC 2008: 653-658
- [c31]
- [c30]
- [c29]
- [c28]Lei Zhang, Yinhe Han, Qiang Xu, Xiaowei Li: Defect Tolerance in Homogeneous Manycore Processors Using Core-Level Redundancy with Unified Topology. DATE 2008: 891-896
- [c27]Jia Li, Qiang Xu, Yu Hu, Xiaowei Li: iFill: An Impact-Oriented X-Filling Method for Shift- and Capture-Power Reduction in At-Speed Scan-Based Testing. DATE 2008: 1184-1189
- [c26]Jia Li, Qiang Xu, Yu Hu, Xiaowei Li: Channel Width Utilization Improvement in Testing NoC-Based Systems for Test Time Reduction. DELTA 2008: 26-31
- [c25]Qiang Xu, Jaspal Subhlok: Construction and Evaluation of Coordinated Performance Skeletons. HiPC 2008: 73-86
- [c24]Jia Li, Xiao Liu, Yubin Zhang, Yu Hu, Xiaowei Li, Qiang Xu: On capture power-aware test data compression for scan-based testing. ICCAD 2008: 67-72
- [c23]
- [c22]Jaspal Subhlok, Qiang Xu: Automatic construction of coordinated performance skeletons. IPDPS 2008: 1-5
- [c21]
- [c20]
- [c19]
- [c18]
- 2007
- [j7]Qiang Xu, Baosheng Wang, André Ivanov, Fung Yu Young: Test scheduling for built-in self-tested embedded SRAMs with data retention faults. IET Computers & Digital Techniques 1(3): 256-264 (2007)
- [j6]Qiang Xu, Nicola Nicolici, Krishnendu Chakrabarty: Test Wrapper Design and Optimization Under Power Constraints for Embedded Cores With Multiple Clock Domains. IEEE Trans. on CAD of Integrated Circuits and Systems 26(8): 1539-1547 (2007)
- [c17]Qiang Xu, Yubin Zhang, Krishnendu Chakrabarty: SOC Test Architecture Optimization for Signal Integrity Faults on Core-External Interconnects. DAC 2007: 676-681
- [c16]
- [c15]Qiang Xu, Dianwei Hu, Dong Xiang: Pattern-directed circuit virtual partitioning for test power reduction. ITC 2007: 1-10
- [c14]Qiang Xu, Yubin Zhang, Krishnendu Chakrabarty: Test-wrapper designs for the detection of signal-integrity faults on core-external interconnects of SoCs. ITC 2007: 1-9
- [c13]Xiucheng Dong, Haibin Wang, Qiang Xu, Xiaoxiao Zhao: Research on Applications of a New-Type Fuzzy-Neural Network Controller. LSMS (1) 2007: 679-687
- 2006
- [j5]Qiang Xu, Nicola Nicolici: DFT Infrastructure for Broadside Two-Pattern Test of Core-Based SOCs. IEEE Trans. Computers 55(4): 470-485 (2006)
- [j4]Qiang Xu, Nicola Nicolici: Multifrequency TAM design for hierarchical SOCs. IEEE Trans. on CAD of Integrated Circuits and Systems 25(1): 181-196 (2006)
- [c12]Qiang Xu, Baosheng Wang, F. Y. Young: Retention-Aware Test Scheduling for BISTed Embedded SRAMs. European Test Symposium 2006: 83-88
- 2005
- [j3]Qiang Xu, Nicola Nicolici: Modular SOC testing with reduced wrapper count. IEEE Trans. on CAD of Integrated Circuits and Systems 24(12): 1894-1908 (2005)
- [j2]Qiang Xu, Nicola Nicolici: Wrapper design for multifrequency IP cores. IEEE Trans. VLSI Syst. 13(6): 678-685 (2005)
- [j1]Qiang Xu, Nicola Nicolici: Modular and rapid testing of SOCs with unwrapped logic blocks. IEEE Trans. VLSI Syst. 13(11): 1275-1285 (2005)
- [c11]Ho Fai Ko, Qiang Xu, Nicola Nicolici: Register-transfer level functional scan for hierarchical designs. ASP-DAC 2005: 1172-1175
- [c10]Qiang Xu, Nicola Nicolici, Krishnendu Chakrabarty: Multi-frequency wrapper design and optimization for embedded cores under average power constraints. DAC 2005: 123-128
- [c9]
- [c8]Qiang Xu, Nicola Nicolici: On concurrent test of wrapped cores and unwrapped logic blocks in SOCs. ITC 2005: 10
- 2004
- [c7]Qiang Xu, Nicola Nicolici: Multi-Frequency Test Access Mechanism Design for Modular SOC Testing. Asian Test Symposium 2004: 2-7
- [c6]Qiang Xu, Nicola Nicolici: Wrapper Design for Testing IP Cores with Multiple Clock Domains. DATE 2004: 416-421
- [c5]Qiang Xu: Content Management and Resources Integration: A Practice in Shanghai Digital Library. ICADL 2004: 25-34
- [c4]Qiang Xu, Nicola Nicolici: Time/Area Tradeoffs in Testing Hierarchical SOCs With Hard Mega-Cores. ITC 2004: 1196-1202
- 2003
- [c3]Qiang Xu, Nicola Nicolici: Delay Fault Testing of Core-Based Systems-on-a-Chi. DATE 2003: 10744-10752
- [c2]Bai Hong Fang, Qiang Xu, Nicola Nicolici: Hardware/Software Co-testing of Embedded Memories in Complex SOCs. ICCAD 2003: 599-606
- [c1]Qiang Xu, Nicola Nicolici: On Reducing Wrapper Boundary Register Cells in Modular SOC Testing. ITC 2003: 622-631
Coauthor Index
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last updated on 2013-06-12 21:34 CEST by the dblp team