Takahiro J. Yamaguchi

Kiichi Niitsu, Naohiro Harigai, Daiki Hirabayashi, Daiki Oki, Masato Sakurai, Osamu Kobayashi, Takahiro J. Yamaguchi, Haruo Kobayashi: Design of a clock jitter reduction circuit using gated phase blending between self-delayed clock edges. ASP-DAC 2013: 103-104

Kiichi Niitsu, Masato Sakurai, Naohiro Harigai, Takahiro J. Yamaguchi, Haruo Kobayashi: CMOS Circuits to Measure Timing Jitter Using a Self-Referenced Clock and a Cascaded Time Difference Amplifier With Duty-Cycle Compensation. J. Solid-State Circuits 47(11): 2701-2710 (2012)

Satoshi Uemori, Masamichi Ishii, Haruo Kobayashi, Yuta Doi, Osamu Kobayashi, Tatsuji Matsuura, Kiichi Niitsu, Yuta Arakawa, Daiki Hirabayashi, Yuji Yano, Tatsuhiro Gake, Nobukazu Takai, Takahiro J. Yamaguchi: Multi-bit sigma-delta TDC architecture with self-calibration. APCCAS 2012: 671-674

Kiichi Niitsu, Masato Sakurai, Naohiro Harigai, Daiki Hirabayashi, Takahiro J. Yamaguchi, Haruo Kobayashi: A reference-free on-chip timing jitter measurement circuit using self-referenced clock and a cascaded time difference amplifier in 65nm CMOS. ASP-DAC 2012: 553-554

Takahiro J. Yamaguchi, Kunihiro Asada, Kiichi Niitsu, Mohamed Abbas, Satoshi Komatsu, Haruo Kobayashi, Jose A. Moreira: A New Procedure for Measuring High-Accuracy Probability Density Functions. ATS 2012: 185-190

Kiichi Niitsu, Takahiro J. Yamaguchi, Masahiro Ishida, Haruo Kobayashi: Post-Silicon Jitter Measurements. ATS 2012: 258-263

Tomohiko Ogawa, Haruo Kobayashi, Satoshi Uemori, Yohei Tan, Satoshi Ito, Nobukazu Takai, Takahiro J. Yamaguchi, Kiichi Niitsu: Design for Testability That Reduces Linearity Testing Time of SAR ADCs. IEICE Transactions 94-C(6): 1061-1064 (2011)

Mohamed Abbas, Takahiro J. Yamaguchi, Yasuo Furukawa, Satoshi Komatsu, Kunihiro Asada: Novel technique for minimizing the comparator delay dispersion in 65nm CMOS technology. ICECS 2011: 220-223

Takahiro J. Yamaguchi, Mohamed Abbas, Mani Soma, Takafumi Aoki, Yasuo Furukawa, Katsuhiko Degawa, Satoshi Komatsu, Kunihiro Asada: An equivalent-time and clocked approach for continuous-time quantization. ISCAS 2011: 2529-2532

Takahiro J. Yamaguchi, Mani Soma, Takafumi Aoki, Yasuo Furukawa, Katsuhiko Degawa, Kunihiro Asada, Mohamed Abbas, Satoshi Komatsu: Application of a continuous-time level crossing quantization method for timing noise measurements. ITC 2011: 1-10

Albert Tumewu, Kazuyuki Miyazawa, Takafumi Aoki, Takahiro J. Yamaguchi, Katsuhiko Degawa, Takayuki Akita: Phase-based alignment of two signals having partially overlapped spectra. ICASSP 2009: 3337-3340

Takahiro J. Yamaguchi, Kiyotaka Ichiyama, X. H. Hou, Masahiro Ishida: A robust method for identifying a deterministic jitter model in a total jitter distribution. ITC 2009: 1-10

Takahiro J. Yamaguchi, Masayuki Kawabata, Mani Soma, Masahiro Ishida, K. Sawami, Koichiro Uekusa: A New Method for Measuring Aperture Jitter in ADC Output and Its Application to ENOB Testing. ITC 2008: 1-9

Kiyotaka Ichiyama, Masahiro Ishida, Takahiro J. Yamaguchi, Mani Soma: An On-Chip Delta-Time-to-Voltage Converter for Real-Time Measurement of Clock Jitter. ISCAS 2007: 2798-2801

Kiyotaka Ichiyama, Masahiro Ishida, Takahiro J. Yamaguchi, Mani Soma: Data jitter measurement using a delta-time-to-voltage converter method. ITC 2007: 1-7

Takahiro J. Yamaguchi, H. X. Hou, Koji Takayama, Dave Armstrong, Masahiro Ishida, Mani Soma: An FFT-based jitter separation method for high-frequency jitter testing with a 10x reduction in test time. ITC 2007: 1-8

Kiyotaka Ichiyama, Masahiro Ishida, Takahiro J. Yamaguchi, Mani Soma: A Real-Time Delta-Time-to-Voltage Converter for Clock Jitter Measurement. ITC 2006: 1-8

Takahiro J. Yamaguchi, Satoshi Iwamoto, Masahiro Ishida, Mani Soma: A Study of Per-Pin Timing Jitter Scope. ITC 2006: 1-7

Takahiro J. Yamaguchi, Masahiro Ishida, Mani Soma: A wideband low-noise ATE-based method for measuring jitter in GHz signals. ITC 2005: 10

Takahiro J. Yamaguchi, Mani Soma, Jim Nissen, David Halter, Rajesh Raina, Masahiro Ishida: Skew measurements in clock distribution circuits using an analytic signal method. IEEE Trans. on CAD of Integrated Circuits and Systems 23(7): 997-1009 (2004)

Kazuyuki Maruo, Masayoshi Ichikawa, Naoto Miyamoto, Leo Karnan, Takahiro J. Yamaguchi, Koji Kotani, Tadahiro Ohmi: A Dynamically-Reconfigurable Image Recognition Processor. IPDPS 2004

Takahiro J. Yamaguchi, Masahiro Ishida, Kiyotaka Ichiyama, Mani Soma, Christian Krawinkel, Katsuaki Ohsawa, Masao Sugai: A Real-Time Jitter Measurement Board for High-Performance Computer and Communication Systems. ITC 2004: 77-84

Takahiro J. Yamaguchi: Loopback or not? ITC 2004: 1434

Takahiro J. Yamaguchi, Masahiro Ishida, Mani Soma, Louis Malarsie, Hirobumi Musha: Timing Jitter Measurement of Intrinsic Random Jitter and Sinusoidal Jitter Using Frequency Division. J. Electronic Testing 19(2): 183-193 (2003)

Takahiro J. Yamaguchi, Mani Soma, Masahiro Ishida, Makoto Kurosawa, Hirobumi Musha: Effects of Deterministic Jitter in a Cable on Jitter Tolerance Measurements. ITC 2003: 58-66

Takahiro J. Yamaguchi: Open Architecture ATE and 250 Consecutive UIs. ITC 2003: 1307

Takahiro J. Yamaguchi, Dong Sam Ha, Masahiro Ishida, Tadahiro Ohmi: A Method for Compressing Test Data Based on Burrows-Wheeler Transformation. IEEE Trans. Computers 51(5): 486-497 (2002)

Masahiro Ishida, Takahiro J. Yamaguchi, Mani Soma, Hirobumi Musha: Effects of Amplitude Modulation in Jitter Tolerance Measurements of Communication Devices. Asian Test Symposium 2002: 45-48

Takahiro J. Yamaguchi, Mani Soma, Masahiro Ishida, Hirobumi Musha, Louis Malarsie: A New Method for Testing Jitter Tolerance of SerDes Devices Using Sinusoidal Jitter. ITC 2002: 717-725

Takahiro J. Yamaguchi: Multi-GHz interface devices should be tested using external test resources. ITC 2002: 1229

Takahiro J. Yamaguchi, Masahiro Ishida, Mani Soma, Louis Malarsie, Hirobumi Musha: Timing Jitter Measurement of 10 Gbps Bit Clock Signals Using Frequency Division. VTS 2002: 207-212

Takahiro J. Yamaguchi, Mani Soma, Jim Nissen, David Halter, Rajesh Raina, Masahiro Ishida: Testing clock distribution circuits using an analytic signal method. ITC 2001: 323-331

Takahiro J. Yamaguchi, Masahiro Ishida, Mani Soma, David Halter, Rajesh Raina, Jim Nissen: A Method for Measuring the Cycle-to-Cycle Period Jitter of High-Frequency Clock Signals. VTS 2001: 102-110

Han Bin Kim, Dong Sam Ha, Takeshi Takahashi, Takahiro J. Yamaguchi: A new approach to built-in self-testable datapath synthesis based on integer linear programming. IEEE Trans. VLSI Syst. 8(5): 594-605 (2000)

Takahiro J. Yamaguchi, Mani Soma, David Halter, Jim Nissen, Rajesh Raina, Masahiro Ishida, Toshifumi Watanabe: Jitter measurements of a PowerPC^TM microprocessor using an analytic signal method. ITC 2000: 955-964

Takahiro J. Yamaguchi, Masahiro Ishida, Mani Soma, Toshifumi Watanabe, Tadahiro Ohmi: Extraction of Peak-to-Peak and RMS Sinusoidal Jitter Using an Analytic Signal Method. VTS 2000: 395-402

Masahiro Ishida, Dong Sam Ha, Takahiro J. Yamaguchi: COMPACT: A Hybrid Method for Compressing Test Data. VTS 1998: 62-69

Takahiro J. Yamaguchi: Static Testing of ADCs Using Wavelet Transforms. Asian Test Symposium 1997: 188-193

Takahiro J. Yamaguchi, Masahiro Ishida, Marco Tilgner, Dong Sam Ha: An Efficient Method for Compressing Test Data. ITC 1997: 79-88

Takahiro J. Yamaguchi, Mani Soma: Dynamic Testing of ADCs Using Wavelet Transforms. ITC 1997: 379-388