| 2013 | ||
|---|---|---|
| j19 | Marcos Villagra, Masaki Nakanishi, Shigeru Yamashita, Yasuhiko Nakashima: Tensor Rank and Strong Quantum Nondeterminism in Multiparty Communication. IEICE Transactions 96-D(1): 1-8 (2013) | |
| c35 | Trung Anh Dinh, Shigeru Yamashita, Tsung-Yi Ho, Yuko Hara-Azumi: A clique-based approach to find binding and scheduling result in flow-based microfluidic biochips. ASP-DAC 2013: 199-204 | |
| 2012 | ||
| j18 | Marcos Villagra, Masaki Nakanishi, Shigeru Yamashita, Yasuhiko Nakashima: Quantum Walks on the Line with Phase Parameters. IEICE Transactions 95-D(3): 722-730 (2012) | |
| j17 | Shigeru Yamashita, Shin-ichi Minato, D. Michael Miller: Synthesis of Semi-Classical Quantum Circuits. Multiple-Valued Logic and Soft Computing 18(1): 99-114 (2012) | |
| c34 | Hratch Mangassarian, Hiroaki Yoshida, Andreas G. Veneris, Shigeru Yamashita, Masahiro Fujita: On error tolerance and Engineering Change with Partially Programmable Circuits. ASP-DAC 2012: 695-700 | |
| c33 | ||
| c32 | Richard Cleve, Kazuo Iwama, François Le Gall, Harumichi Nishimura, Seiichiro Tani, Junichi Teruyama, Shigeru Yamashita: Reconstructing Strings from Substrings with Quantum Queries. SWAT 2012: 388-397 | |
| c31 | Marcos Villagra, Masaki Nakanishi, Shigeru Yamashita, Yasuhiko Nakashima: Tensor Rank and Strong Quantum Nondeterminism in Multiparty Communication. TAMC 2012: 400-411 | |
| i4 | Marcos Villagra, Masaki Nakanishi, Shigeru Yamashita, Yasuhiko Nakashima: Tensor Rank and Strong Quantum Nondeterminism in Multiparty Communication. CoRR abs/1202.6444 (2012) | |
| i3 | Richard Cleve, Kazuo Iwama, François Le Gall, Harumichi Nishimura, Seiichiro Tani, Junichi Teruyama, Shigeru Yamashita: Reconstructing Strings from Substrings with Quantum Queries. CoRR abs/1204.4691 (2012) | |
| i2 | Marcos Villagra, Masaki Nakanishi, Shigeru Yamashita, Yasuhiko Nakashima: Tensor Rank and Strong Quantum Nondeterminism in Multiparty Communication. Electronic Colloquium on Computational Complexity (ECCC) 19: 4 (2012) | |
| 2011 | ||
| j16 | Yuichi Hirata, Masaki Nakanishi, Shigeru Yamashita, Yasuhiko Nakashima: An efficient conversion of quantum circuits to a linear nearest neighbor architecture. Quantum Information & Computation 11(1&2): 142-166 (2011) | |
| c30 | Hiroshi Aoki, Shigeru Yamashita, Shin-ichi Minato: An efficient algorithm for constructing a Sequence Binary Decision Diagram representing a set of reversed sequences. GrC 2011: 54-59 | |
| c29 | Atsushi Matsuo, Shigeru Yamashita: Changing the Gate Order for Optimal LNN Conversion. RC 2011: 89-101 | |
| 2010 | ||
| j15 | Shigeru Yamashita, Igor L. Markov: Fast equivalence - checking for quantum circuits. Quantum Information & Computation 10(9&10): 721-734 (2010) | |
| 2009 | ||
| j14 | Seiichiro Tani, Masaki Nakanishi, Shigeru Yamashita: Multi-Party Quantum Communication Complexity with Routed Messages. IEICE Transactions 92-D(2): 191-199 (2009) | |
| j13 | Yumi Nakajima, Yasuhito Kawano, Hiroshi Sekigawa, Masaki Nakanishi, Shigeru Yamashita, Yasuhiko Nakashima: Synthesis of quantum circuits for d-level systems by using cosine-sine decomposition. Quantum Information & Computation 9(5): 423-443 (2009) | |
| i1 | Andris Ambainis, Kazuo Iwama, Masaki Nakanishi, Harumichi Nishimura, Rudy Raymond, Seiichiro Tani, Shigeru Yamashita: Average/Worst-Case Gap of Quantum Query Complexities by On-Set Size. CoRR abs/0908.2468 (2009) | |
| 2008 | ||
| j12 | Shigeru Yamashita, Shin-ichi Minato, D. Michael Miller: DDMF: An Efficient Decision Diagram Structure for Design Verification of Quantum Circuits under a Practical Restriction. IEICE Transactions 91-A(12): 3793-3802 (2008) | |
| c28 | Shigeru Yamashita, Shin-ichi Minato, D. Michael Miller: An efficient verification of quantum circuits under a practical restriction. CIT 2008: 873-879 | |
| c27 | Seiichiro Tani, Masaki Nakanishi, Shigeru Yamashita: Multi-party Quantum Communication Complexity with Routed Messages. COCOON 2008: 180-190 | |
| c26 | Kazuo Iwama, Harumichi Nishimura, Mike Paterson, Rudy Raymond, Shigeru Yamashita: Polynomial-Time Construction of Linear Network Coding. ICALP (1) 2008: 271-282 | |
| c25 | Andris Ambainis, Kazuo Iwama, Masaki Nakanishi, Harumichi Nishimura, Rudy Raymond, Seiichiro Tani, Shigeru Yamashita: Quantum Query Complexity of Boolean Functions with Small On-Sets. ISAAC 2008: 907-918 | |
| c24 | Kouki Suzuki, Takashi Nakada, Masaki Nakanishi, Shigeru Yamashita, Yasuhiko Nakashima: A Functional Unit with Small Variety of Highly Reliable Cells. PRDC 2008: 353-354 | |
| 2007 | ||
| j11 | Tomoya Suzuki, Shigeru Yamashita, Masaki Nakanishi, Katsumasa Watanabe: Robust Quantum Algorithms Computing OR with epsilon-Biased Oracles. IEICE Transactions 90-D(2): 395-402 (2007) | |
| j10 | Andris Ambainis, Kazuo Iwama, Akinori Kawachi, Rudy Raymond, Shigeru Yamashita: Improved algorithms for quantum identification of Boolean oracles. Theor. Comput. Sci. 378(1): 41-53 (2007) | |
| c23 | Shinya Hiramoto, Masaki Nakanishi, Shigeru Yamashita, Yasuhiko Nakashima: A Hardware SAT Solver Using Non-chronological Backtracking and Clause Recording Without Overheads. ARC 2007: 343-349 | |
| c22 | Shigeru Yamashita, Masaki Nakanishi: A practical framework to utilize quantum search. IEEE Congress on Evolutionary Computation 2007: 4086-4093 | |
| c21 | Kazuo Iwama, Harumichi Nishimura, Rudy Raymond, Shigeru Yamashita: Unbounded-Error One-Way Classical and Quantum Communication Complexity. ICALP 2007: 110-121 | |
| c20 | Kazuo Iwama, Harumichi Nishimura, Rudy Raymond, Shigeru Yamashita: Unbounded-Error Classical and Quantum Communication Complexity. ISAAC 2007: 100-111 | |
| c19 | Masahito Hayashi, Kazuo Iwama, Harumichi Nishimura, Rudy Raymond Harry Putra, Shigeru Yamashita: Quantum Network Coding. STACS 2007: 610-621 | |
| 2006 | ||
| j9 | Mitsuru Tomono, Masaki Nakanishi, Shigeru Yamashita, Kazuo Nakajima, Katsumasa Watanabe: An Efficient and Effective Algorithm for Online Task Placement with I/O Communications in Partially Reconfigurable FPGAs. IEICE Transactions 89-A(12): 3416-3426 (2006) | |
| j8 | Mark Adcock, Richard Cleve, Kazuo Iwama, Raymond H. Putra, Shigeru Yamashita: Quantum lower bounds for the Goldreich-Levin problem. Inf. Process. Lett. 97(5): 208-211 (2006) | |
| c18 | Shigeru Yamashita, Katsunori Tanaka, Hideyuki Takada, Koji Obata, Kazuyoshi Takagi: A transduction-based framework to synthesize RSFQ circuits. ASP-DAC 2006: 266-272 | |
| c17 | Tomoya Suzuki, Shigeru Yamashita, Masaki Nakanishi, Katsumasa Watanabe: Robust Quantum Algorithms with epsilon-Biased Oracles. COCOON 2006: 116-125 | |
| c16 | Masahito Hayashi, Kazuo Iwama, Harumichi Nishimura, Rudy Raymond, Shigeru Yamashita: Quantum Network Coding. Complexity of Boolean Functions 2006 | |
| c15 | Andris Ambainis, Kazuo Iwama, Akinori Kawachi, Rudy Raymond Harry Putra, Shigeru Yamashita: Improved Algorithms for Quantum Identification of Boolean Oracles. SWAT 2006: 280-291 | |
| 2005 | ||
| j7 | Kazuo Iwama, Akinori Kawachi, Shigeru Yamashita: Quantum Sampling for Balanced Allocations. IEICE Transactions 88-D(1): 39-46 (2005) | |
| j6 | Katsunori Tanaka, Shigeru Yamashita, Yahiko Kambayashi: SPFD-Based Flexible Transformation of LUT-Based FPGA Circuits. IEICE Transactions 88-A(4): 1038-1046 (2005) | |
| c14 | Mitsuru Tomono, Masaki Nakanishi, Katsumasa Watanabe, Shigeru Yamashita: Event-oriented computing with reconfigurable platform. ASP-DAC 2005: 1248-1251 | |
| c13 | Nobuo Nakai, Masaki Nakanishi, Shigeru Yamashita, Katsumasa Watanabe: Reconfigurable 1-Bit Processor Array with Reduced Wirng Area. ERSA 2005: 225-234 | |
| 2004 | ||
| c12 | Katsunori Tanaka, Shigeru Yamashita, Yahiko Kambayashi: SPFD-based one-to-many rewiring. FPGA 2004: 250 | |
| c11 | Katsunori Tanaka, Shigeru Yamashita, Yahiko Kambayashi: SPFD-based effective one-to-many rewiring (OMR) for delay reduction of LUT-based FPGA circuits. ACM Great Lakes Symposium on VLSI 2004: 348-353 | |
| c10 | Andris Ambainis, Kazuo Iwama, Akinori Kawachi, Hiroyuki Masuda, Raymond H. Putra, Shigeru Yamashita: Quantum Identification of Boolean Oracles. STACS 2004: 105-116 | |
| 2003 | ||
| j5 | Kazuo Iwama, Shigeru Yamashita: Transformation Rules for CNOT-based Quantum Circuits and Their Applications. New Generation Comput. 21(4): 297-317 (2003) | |
| j4 | Noboru Kunihiro, Shigeru Yamashita: Efficient Algorithms for NMR Quantum Computers with Small Qubits. New Generation Comput. 21(4): 329-337 (2003) | |
| c9 | Kazuo Iwama, Akinori Kawachi, Shigeru Yamashita: Quantum Sampling for Balanced Allocations. COCOON 2003: 304-318 | |
| 2002 | ||
| c8 | Kazuo Iwama, Yahiko Kambayashi, Shigeru Yamashita: Transformation rules for designing CNOT-based quantum circuits. DAC 2002: 419-424 | |
| 2000 | ||
| j3 | Shigeru Yamashita, Hiroshi Sawada, Akira Nagoya: SPFD: A new method to express functional flexibility. IEEE Trans. on CAD of Integrated Circuits and Systems 19(8): 840-849 (2000) | |
| c7 | Shigeru Yamashita, Hiroshi Sawada, Akira Nagoya: An efficient framework of using various decomposition methods to synthesize LUT networks and its evaluation. ASP-DAC 2000: 253-258 | |
| 1999 | ||
| c6 | Shigeru Yamashita, Hiroshi Sawada, Akira Nagoya: An Integrated Approach for Synthesizing LUT Networks. Great Lakes Symposium on VLSI 1999: 136-139 | |
| 1998 | ||
| c5 | Shigeru Yamashita, Hiroshi Sawada, Akira Nagoya: New Methods to Find Optimal Non-Disjoint Bi-Decompositions. ASP-DAC 1998: 59-68 | |
| c4 | Hiroshi Sawada, Shigeru Yamashita, Akira Nagoya: Restructuring Logic Representations with Easily Detectable Simple Disjunctive Decompositions. DATE 1998: 755-759 | |
| 1997 | ||
| c3 | Hiroshi Sawada, Shigeru Yamashita, Akira Nagoya: Restricted Simple Disjunctive Decompositions Based on Grouping Symmetric Variables. Great Lakes Symposium on VLSI 1997: 39-44 | |
| 1996 | ||
| j2 | Shigeru Yamashita, Yahiko Kambayashi, Saburo Muroga: Design of logic circuits with wired-logic utilizing transduction method. Systems and Computers in Japan 27(11): 19-28 (1996) | |
| j1 | Shigeru Yamashita, Yahiko Kambayashi, Saburo Muroga: Optimization methods for look-up table-type FPGAs based on permissible functions. Systems and Computers in Japan 27(12): 92-101 (1996) | |
| c2 | Shigeru Yamashita, Hiroshi Sawada, Akira Nagoya: A new method to express functional permissibilities for LUT based FPGAs and its applications. ICCAD 1996: 254-261 | |
| 1995 | ||
| c1 | Shigeru Yamashita, Yahiko Kambayashi, Saburo Muroga: Optimization methods for lookup-table-based FPGAs using transduction method. ASP-DAC 1995 | |
Colors in the list of coauthors
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