| 2005 | ||
|---|---|---|
| c23 | Kensuke Iseri, Syoji Kobashi, Katsuya Kondo, Kazuharu Yamato, Yutaka Hata: A Fuzzy Logic Approach for Estimating Roughness by 1MHz Ultrasonic System. SMC 2005: 1500-1505 | |
| 2004 | ||
| c22 | Naotake Kamiura, Teijiro Isokawa, Kazuharu Yamato, Nobuyuki Matsui: On Retrieval of Lost Functions for Feedforward Neural Networks Using Re-Learning. KES 2004: 491-497 | |
| 2002 | ||
| c21 | Naotake Kamiura, Kazuharu Yamato, Teijiro Isokawa, Nobuyuki Matsui: Learning-Based On-Line Testing in Feedforward Neural Networks. IOLTW 2002: 180 | |
| 2001 | ||
| c20 | Naotake Kamiura, Teijiro Isokawa, Nobuyuki Matsui, Kazuharu Yamato: On-Line Multiple-Fault-Detection of Fuzzy Controllers. IOLTW 2001: 202- | |
| 2000 | ||
| c19 | Takahiro Hozumi, Osamu Kakusho, Kazuharu Yamato: An Evolutionary Computing Approach to Multilevel Logic Synthesis Using Various Logic Operations. ISMVL 2000: 259-264 | |
| 1998 | ||
| c18 | Naotake Kamiura, Yutaka Hata, Kazuharu Yamato: On Concurrent Tests of Fuzzy Controllers. ISMVL 1998: 356- | |
| 1997 | ||
| c17 | Yutaka Hata, Kiyoshi Hayase, Takahiro Hozumi, Naotake Kamiura, Kazuharu Yamato: Multiple-Valued Logic Minimization by Genetic Algorithms. ISMVL 1997: 97-102 | |
| c16 | Yutaka Hata, Naotake Kamiura, Kazuharu Yamato: Multiple-Valued Product-of-Sums Expression with Truncated Sum. ISMVL 1997: 103- | |
| c15 | T. Utsumi, Naotake Kamiura, Yutaka Hata, Kazuharu Yamato: Multiple-Valued Programmable Logic Arrays with Universal Literals. ISMVL 1997: 163-168 | |
| 1996 | ||
| c14 | Naotake Kamiura, Yutaka Hata, Kazuharu Yamato: On Design of Fail-Safe Cellular Arrays. Asian Test Symposium 1996: 107-112 | |
| 1995 | ||
| j4 | Naotake Kamiura, Hidetoshi Satoh, Yutaka Hata, Kazuharu Yamato: On Ternary Cellular Arrays Designed from Ternary Decision Diagrams. IEICE Transactions 78-D(4): 326-335 (1995) | |
| c13 | Naotake Kamiura, Yutaka Hata, Kazuharu Yamato: A cellular array designed from a Multiple-valued Decision Diagram and its fault tests. Asian Test Symposium 1995: 20- | |
| c12 | Yutaka Hata, Naotake Kamiura, Kazuharu Yamato: On Input Permutation Technique for Multiple-Valued Logic Synthesis. ISMVL 1995: 170- | |
| c11 | Takahiro Hozumi, Naotake Kamiura, Yutaka Hata, Kazuharu Yamato: Multiple-Valued Logic Design Using Multiple-Valued EXOR. ISMVL 1995: 290-295 | |
| 1994 | ||
| j3 | Naotake Kamiura, Yutaka Hata, Kazuharu Yamato: Design and fault diagnosis of cellular arrays realizing multiple-valued logic functions. Systems and Computers in Japan 25(9): 41-52 (1994) | |
| c10 | Yutaka Hata, Kazuharu Yamato: A Multiple-Valued Logic Synthesis Using the Kleenean Coefficients. ISMVL 1994: 52-57 | |
| c9 | Naotake Kamiura, Yutaka Hata, Kazuharu Yamato: Design of Fault-Tolerant Cellular Arrays on Multiple-Valued Logic. ISMVL 1994: 297-304 | |
| 1993 | ||
| j2 | Yutaka Hata, Masaharu Yuhara, Fujio Miyawaki, Kazuharu Yamato: Enumeration of multiple-valued kleenean functions and some related properties. Systems and Computers in Japan 24(3): 1-12 (1993) | |
| j1 | Yutaka Hata, Kyoichi Nakashima, Kazuharu Yamato: Some Fundamental Properties of Multiple-Valued Kleenean Functions and Determination of Their Logic Formulas. IEEE Trans. Computers 42(8): 950-961 (1993) | |
| c8 | Yutaka Hata, Takahiro Hozumi, Kazuharu Yamato: Gate Model Networks for Minimization of Multiple-Valued Logic Functions. ISMVL 1993: 29-34 | |
| c7 | Naotake Kamiura, Yutaka Hata, Kazuharu Yamato: A Repairable and Diagnosable Cellular Array on Multiple-Valued Logic. ISMVL 1993: 92-97 | |
| c6 | Kiyotaka Miyai, Yutaka Hata, Kazuharu Yamato: A Representation of Approximate Reasoning with Analogy. ISMVL 1993: 184-189 | |
| c5 | Yutaka Hata, Kazuharu Yamato: Multiple-Valued Logic Functions Represented by TSUM, TPRODUCT, NOT and Variables. ISMVL 1993: 222-227 | |
| 1992 | ||
| c4 | Naotake Kamiura, Yutaka Hata, Fujio Miyawaki, Kazuharu Yamato: Easily Testable Multiple-Valued Cellular Arrays. ISMVL 1992: 36-42 | |
| c3 | Yutaka Hata, Fujio Miyawaki, Kazuharu Yamato: Optimal Output Assignment and the Maximum Number of Implicants Needed to Cover the Multiple-Valued Logic Functions. ISMVL 1992: 389-395 | |
| 1991 | ||
| c2 | Yutaka Hata, Masaharu Yuhara, Fujio Miyawaki, Kazuharu Yamato: On the Complexity of Enumerations for Multiple-Valued Kleenean Functions and Unate Functions. ISMVL 1991: 55-62 | |
| 1990 | ||
| c1 | Yutaka Hata, Kyoichi Nakashima, Kazuharu Yamato: Some Relationships Between Multiple-Valued Kleenean Functions and Ternary Input Multiple-Valued Output Functions. ISMVL 1990: 410-417 | |
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