| 2003 | ||
|---|---|---|
| c2 | Jaeyoung Kwak, Sook Min Park, Sang-Sic Yoon, Kwyro Lee: Implementation of a parallel turbo decoder with dividable interleaver. ISCAS (2) 2003: 65-68 | |
| 1999 | ||
| c1 | Jaeyoung Kwak, Sang-Sic Yoon, Hung-Jun Kwon, Kwyro Lee: A design of the new FPGA with data path logic and run time block reconfiguration method. ISCAS (1) 1999: 467-469 | |
| 1 | Jaeyoung Kwak | |
| 2 | Hung-Jun Kwon | |
| 3 | Kwyro Lee | |
| 4 | Sook Min Park |
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