Takeshi Yoshimura

Nan Liu, Song Chen, Takeshi Yoshimura: Resource-Aware Multi-Layer Floorplanning for Partially Reconfigurable FPGAs. IEICE Transactions 96-C(4): 501-510 (2013)

Cong Hao, Song Chen, Takeshi Yoshimura: Network simplex method based Multiple Voltage Scheduling in Power-efficient High-level synthesis. ASP-DAC 2013: 237-242

Wei Zhong, Takeshi Yoshimura, Bei Yu, Song Chen, Sheqin Dong, Satoshi Goto: Cluster Generation and Network Component Insertion for Topology Synthesis of Application-Specific Network-on-Chips. IEICE Transactions 95-C(4): 534-545 (2012)

Nan Liu, Song Chen, Takeshi Yoshimura: Floorplanning for High Utilization of Heterogeneous FPGAs. IEICE Transactions 95-A(9): 1529-1537 (2012)

Nan Liu, Shiyu Liu, Takeshi Yoshimura: Wirelength driven I/O buffer placement for flip-chip with timing-constrained. APCCAS 2012: 631-634

Song Chen, Xiaolin Zhang, Takeshi Yoshimura: Practically scalable floorplanning with voltage island generation. ISLPED 2012: 27-32

Bo Huang, Song Chen, Wei Zhong, Takeshi Yoshimura: Application-Specific Network-on-Chip synthesis with topology-aware floorplanning. SBCCI 2012: 1-6

Wei Chen, Xiaolin Zhang, Takeshi Yoshimura, Yuichi Nakamura: A low power technology mapping method for Adaptive Logic Module. FPT 2011: 1-5

Takafumi Yamazoe, Minoru Etoh, Takeshi Yoshimura, Kousuke Tsujino: Hypothesis Preservation Approach to Scene Text Recognition with Weighted Finite-State Transducer. ICDAR 2011: 359-363

Wei Zhong, Song Chen, Fei Ma, Takeshi Yoshimura, Satoshi Goto: Floorplanning driven Network-on-Chip synthesis for 3-D SoCs. ISCAS 2011: 1203-1206

Wei Zhong, Bei Yu, Song Chen, Takeshi Yoshimura, Sheqin Dong, Satoshi Goto: Application-specific Network-on-Chip synthesis: Cluster generation and network component insertion. ISQED 2011: 144-149

Nan Liu, Song Chen, Takeshi Yoshimura: Floorplanning for high utilization of heterogeneous FPGAs. ISQED 2011: 270-275

Song Chen, Jianwei Shen, Wei Guo, Mei-Fang Chiang, Takeshi Yoshimura: Redundant via Insertion: Removing Design Rule Conflicts and Balancing via Density. IEICE Transactions 93-A(12): 2372-2379 (2010)

Song Chen, Takeshi Yoshimura: Multi-layer floorplanning for stacked ICs: Configuration number and fixed-outline constraints. Integration 43(4): 378-388 (2010)

Wei Zhong, Song Chen, Takeshi Yoshimura: Whitespace insertion for through-silicon via planning on 3-D SoCs. ISCAS 2010: 913-916

Takeshi Yoshimura, Chang-Jun Ahn, Takeshi Kamio, Hisato Fujisaka, Kazuhisa Haeiwa: Performance enhancement of TFI-OFDM with path selection based channel identification. Digital Signal Processing 19(5): 852-860 (2009)

Song Chen, Liangwei Ge, Mei-Fang Chiang, Takeshi Yoshimura: Lagrangian Relaxation Based Inter-Layer Signal Via Assignment for 3-D ICs. IEICE Transactions 92-A(4): 1080-1087 (2009)

Hosei Matsuoka, Yusuke Nakashima, Takeshi Yoshimura: Acoustic OFDM system and its extension. The Visual Computer 25(1): 3-12 (2009)

Mei-Fang Chiang, Takumi Okamoto, Takeshi Yoshimura: Register placement for high-performance circuits. DATE 2009: 1470-1475

Mei-Fang Chiang, Takumi Okamoto, Takeshi Yoshimura: Lagrangian relaxation based register placement for high-performance circuits. ISQED 2009: 511-516

Song Chen, Zheng Xu, Takeshi Yoshimura: A generalized V-shaped multilevel method for large scale floorplanning. ISQED 2009: 734-739

Hosei Matsuoka, Yusuke Nakashima, Takeshi Yoshimura: Acoustic OFDM System and Performance Analysis. IEICE Transactions 91-A(7): 1652-1658 (2008)

Yusuke Nakashima, Hosei Matsuoka, Takeshi Yoshimura, Hiroshi Miura, Seiichi Nakajima, Masanori Machida, Gen-ichiro Ohta: Data Transmission on AM Broadcast with Acoustic OFDM. IEICE Transactions 91-B(10): 3149-3156 (2008)

Song Chen, Takeshi Yoshimura: Fixed-Outline Floorplanning: Block-Position Enumeration and a New Method for Calculating Area Costs. IEEE Trans. on CAD of Integrated Circuits and Systems 27(5): 858-871 (2008)

Hosei Matsuoka, Yusuke Nakashima, Takeshi Yoshimura, Toshiro Kawahara: Acoustic OFDM: Embedding High Bit-Rate Data in Audio. MMM 2008: 498-507

Masaya Takahashi, Takahiro Watanabe, Takeshi Yoshimura: Score Sequence Pair Problems of (r₁₁, r₁₂, r₂₂)-Tournaments - - Determination of Realizability - - . IEICE Transactions 90-D(2): 440-448 (2007)

Liangwei Ge, Song Chen, Kazutoshi Wakabayashi, Takashi Takenaka, Takeshi Yoshimura: Max-Flow Scheduling in High-Level Synthesis. IEICE Transactions 90-A(9): 1940-1948 (2007)

Masaya Takahashi, Takahiro Watanabe, Takeshi Yoshimura: Construction of an (r11, r12, r22)-Tournament from a Score Sequence Pair. ISCAS 2007: 3403-3406

Song Chen, Takeshi Yoshimura: A stable fixed-outline floorplanning method. ISPD 2007: 119-126

Yuichi Nakamura, Takeshi Yoshimura: Hierarchical-Analysis-Based Fast Chip-Scale Power Estimation Method for Large and Complex LSIs. IEICE Transactions 89-A(12): 3458-3463 (2006)

Ko Yoshikawa, Shigeto Inui, Yasuhiko Hagihara, Yuichi Nakamura, Takeshi Yoshimura: Domino Logic Synthesis System and its Applications. Journal of Circuits, Systems, and Computers 15(2): 277-287 (2006)

Masaya Takahashi, Takahiro Watanabe, Takeshi Yoshimura: Realizability of Score Sequence Pair of an (r1l, r12, r22)-Tournament. APCCAS 2006: 1019-1022

Song Chen, Takeshi Yoshimura: On the Number of 3-D IC Floorplan Configurations and a Solution Perturbation Method with Good Convergence. APCCAS 2006: 1867-1870

Yuichi Nakamura, Ko Yoshikawa, Takeshi Yoshimura: An Engineering Change Orders Design Method Based on Patchwork-Like Partitioning for High Performance LSIs. IEICE Transactions 88-A(12): 3351-3357 (2005)

Gene Cheung, Wai-tian Tan, Takeshi Yoshimura: Real-time video transport optimization using streaming agent over 3G wireless networks. IEEE Transactions on Multimedia 7(4): 777-785 (2005)

Yuichi Nakamura, Takeshi Yoshimura: A fast chip-scale power estimation method for large and complex LSIs based on hierarchical analysis. ISCAS (1) 2005: 628-631

Gene Cheung, Wai-tian Tan, Takeshi Yoshimura: Double feedback streaming agent for real-time delivery of media over 3G wireless networks. IEEE Transactions on Multimedia 6(2): 304-314 (2004)

Ko Yoshikawa, Yasuhiko Hagihara, Keisuke Kanamaru, Yuichi Nakamura, Shigeto Inui, Takeshi Yoshimura: Timing optimization by replacing flip-flops to latches. ASP-DAC 2004: 186-191

Yuichi Nakamura, Kohei Hosokawa, Ichiro Kuroda, Ko Yoshikawa, Takeshi Yoshimura: A fast hardware/software co-verification method for system-on-a-chip by using a C/C++ simulator and FPGA emulator with shared register communication. DAC 2004: 299-304

Hosei Matsuoka, Takeshi Yoshimura, Tomoyuki Ohya: A Robust Method for Soft IP Handover. IEEE Internet Computing 7(2): 18-24 (2003)

Hosei Matsuoka, Takeshi Yoshimura, Tomoyuki Ohya: End-to-end robust IP soft handover. ICC 2003: 532-536

Sumit Roy, Michele Covell, John Ankcorn, Susie Wee, Takeshi Yoshimura: A System Architecture for Managing Mobile Streaming Media Service. ICDCS Workshops 2003: 408-413

Gene Cheung, Wai-tian Tan, Takeshi Yoshimura: Double feedback streaming agent for real-time delivery of media over 3G wireless networks. WCNC 2003: 2102-2106

Gene Cheung, Wai-tian Tan, Takeshi Yoshimura: Streaming agent for wired network/wireless link rate-mismatch environment. IEEE Workshop on Multimedia Signal Processing 2002: 388-391

Takeshi Yoshimura, Tomoyuki Ohya, Toshiro Kawahara, Minoru Etoh: Rate and robustness control with RTP monitoring agent for mobile multimedia streaming. ICC 2002: 2513-2517

Gene Cheung, Wai-tian Tan, Takeshi Yoshimura: Rate-distortion optimized application-level retransmission using streaming agent for video streaming over 3G wireless network. ICIP (1) 2002: 529-532

Takeshi Yoshimura, Yoshifumi Yonemoto, Tomoyuki Ohya, Minoru Etoh, Susie Wee: Mobile streaming media CDN enabled by dynamic SMIL. WWW 2002: 651-661

Pei-Ning Guo, Toshihiko Takahashi, Chung-Kuan Cheng, Takeshi Yoshimura: Floorplanning using a tree representation. IEEE Trans. on CAD of Integrated Circuits and Systems 20(2): 281-289 (2001)

Yingxin Pang, Chung-Kuan Cheng, Takeshi Yoshimura: An enhanced perturbing algorithm for floorplan design using the O-tree representation. ISPD 2000: 168-173

Pei-Ning Guo, Chung-Kuan Cheng, Takeshi Yoshimura: An O-Tree Representation of Non-Slicing Floorplan and Its Applications. DAC 1999: 268-273

Yuichi Nakamura, Takeshi Yoshimura: A Partitioning-Based Logic Optimization Method for Large Scale Circuits with Boolean Matrix. DAC 1995: 653-657

Takashi Fujii, Yoko Mima, Tsuneo Matsuda, Takeshi Yoshimura: A Multi-Layer Channel Router with New Style of Over-the-Cell Routing. DAC 1992: 585-588

Masato Edahiro, Takeshi Yoshimura: New Placement and Global Routing Algorithms for Standard Cell Layouts. DAC 1990: 642-645

Masaki Ishikawa, Tsuneo Matsuda, Takeshi Yoshimura, Satoshi Goto: Compaction-Based Custom LSI Layout Design Method. IEEE Trans. on CAD of Integrated Circuits and Systems 6(3): 374-382 (1987)

Takeshi Yoshimura: An efficient channel router. DAC 1984: 38-44

Takeshi Yoshimura, Ernest S. Kuh: Efficient Algorithms for Channel Routing. IEEE Trans. on CAD of Integrated Circuits and Systems 1(1): 25-35 (1982)