Chi-Li Yu

Ahmed Al-Maashri, Matthew Cotter, Nandhini Chandramoorthy, Michael DeBole, Chi-Li Yu, Vijaykrishnan Narayanan, Chaitali Chakrabarti: Hardware Acceleration for Neuromorphic Vision Algorithms. Signal Processing Systems 70(2): 163-175 (2013)

Chi-Li Yu, Chaitali Chakrabarti: Transpose-free SAR imaging on FPGA platform. ISCAS 2012: 762-765

Chi-Li Yu, Kevin M. Irick, Chaitali Chakrabarti, Vijaykrishnan Narayanan: Multidimensional DFT IP Generator for FPGA Platforms. IEEE Trans. on Circuits and Systems 58-I(4): 755-764 (2011)

Chi-Li Yu, Jungsub Kim, Lanping Deng, Srinidhi Kestur, Vijaykrishnan Narayanan, Chaitali Chakrabarti: FPGA Architecture for 2D Discrete Fourier Transform Based on 2D Decomposition for Large-sized Data. Signal Processing Systems 64(1): 109-122 (2011)

Michael DeBole, Ahmed Al-Maashri, Matthew Cotter, Chi-Li Yu, Chaitali Chakrabarti, Vijaykrishnan Narayanan: A framework for accelerating neuromorphic-vision algorithms on FPGAs. ICCAD 2011: 810-813

Ahmed Al-Maashri, Michael DeBole, Chi-Li Yu, Vijaykrishnan Narayanan, Chaitali Chakrabarti: A hardware architecture for accelerating neuromorphic vision algorithms. SiPS 2011: 355-360

Chi-Li Yu, Chaitali Chakrabarti, Sungho Park, Vijaykrishnan Narayanan: Bandwidth-intensive FPGA architecture for multi-dimensional DFT. ICASSP 2010: 1486-1489

Jungsub Kim, Chi-Li Yu, Lanping Deng, Srinidhi Kestur, Vijaykrishnan Narayanan, Chaitali Chakrabarti: FPGA architecture for 2D Discrete Fourier Transform based on 2D decomposition for large-sized data. SiPS 2009: 121-126

Lanping Deng, Chi-Li Yu, Chaitali Chakrabarti, Jungsub Kim, Vijaykrishnan Narayanan: Efficient image reconstruction using partial 2D Fourier transform. SiPS 2008: 49-54

Chi-Li Yu, Tzu-Hao Yu, An-Yeu Wu: On the Fixed-Point Properties of Mixed-Scaling-Rotation Cordic Algorithm. SiPS 2007: 430-435

Tzu-Hao Yu, Chi-Li Yu, Kai-Yuan Jheng, An-Yeu Wu: On-Line MSR-CORDIC VLSI Architecture with Applications to Cost-Efficient Rotation-Based Adaptive Filtering Systems. SiPS 2006: 422-427

Chi-Li Yu, An-Yeu Wu: An improved time-recursive lattice structure for low-latency IFFT architecture in DMT transmitter. ISCAS (4) 2001: 250-253