Please note: This is a beta version of the new dblp website.
You can find the classic dblp view of this page here.
You can find the classic dblp view of this page here.
C. Patrick Yue
2010 – today
- 2013
[c10]Yan Lu, Xing Li, Wing-Hung Ki, Chi-Ying Tsui, C. Patrick Yue: A 13.56MHz fully integrated 1X/2X active rectifier with compensated bias current for inductively powered devices. ISSCC 2013: 66-67- 2012
- [c9]Jiao Cheng, Lingli Xia, Chao Ma, Yong Lian, Xiaoyuan Xu, C. Patrick Yue, Zhiliang Hong, Patrick Yin Chiang: A near-threshold, multi-node, wireless body area sensor network powered by RF energy harvesting. CICC 2012: 1-4
2000 – 2009
- 2009
- [c8]Dong Hun Shin, Ji-Eun Jang, Frank O'Mahony, C. Patrick Yue: A 1-mW 12-Gb/s continuous-time adaptive passive equalizer in 90-nm CMOS. CICC 2009: 117-120
- [c7]Munkyo Seo, Basanth Jagannathan, Corrado Carta, John Pekarik, Luis Chen, C. Patrick Yue, Mark J. W. Rodwell: A 1.1V 150GHz amplifier with 8dB gain and +6dBm saturated output power in standard digital 65nm CMOS using dummy-prefilled microstrip lines. ISSCC 2009: 484-485
- 2007
- [c6]Dongwoo Hong, Shadi Saberi, Kwang-Ting Cheng, C. Patrick Yue: A two-tone test method for continuous-time adaptive equalizers. DATE 2007: 1283-1288
- 2005
- [c5]Ruifeng Sun, Jaejin Park, Frank O'Mahony, C. Patrick Yue: A low-power, 20-Gb/s continuous-time adaptive passive equalizer. ISCAS (2) 2005: 920-923
- [c4]Jaejin Park, Ruifeng Sun, L. Rick Carley, C. Patrick Yue: A 10-Gbps, 8-PAM parallel interface with crosstalk cancellation for future hard disk drive channel ICs. ISCAS (2) 2005: 1162-1165
- 2003
- [c3]Frank O'Mahony, C. Patrick Yue, Mark Horowitz, S. Simon Wong: Design of a 10GHz clock distribution network using coupled standing-wave oscillators. DAC 2003: 682-687
- [c2]S. Simon Wong, C. Patrick Yue, Richard Chang, So-Young Kim, Bendik Kleveland, Frank O'Mahony: On-Chip Interconnect Inductance - Friend or Foe (Invited). ISQED 2003: 389-394
1990 – 1999
- 1999
- [c1]C. Patrick Yue, S. Simon Wong: Design Strategy of On-Chip Inductors for Highly Integrated RF Systems. DAC 1999: 982-987
- 1993
- [j1]C. Patrick Yue, Victor Martin Agostinelli Jr., Gregory Munson Yeric, A. F. Tasch Jr.: Improved universal MOSFET electron mobility degradation models for circuit simulation. IEEE Trans. on CAD of Integrated Circuits and Systems 12(10): 1542-1546 (1993)
Coauthor Index
data released under the ODC-BY 1.0 license. See also our legal information page
last updated on 2013-04-09 21:21 CEST by the dblp team