| 2012 | ||
|---|---|---|
| c3 | Se-Hyun Yang, Seogjun Lee, Jae Young Lee, Jeonglae Cho, Hoi-Jin Lee, Dongsik Cho, Junghun Heo, Sunghoon Cho, Youngmin Shin, Sunghee Yun, Euiseok Kim, Ukrae Cho, Edward Pyo, Man Hyuk Park, Jae-Cheol Son, Chinhyun Kim, Jeongnam Youn, Youngki Chung, Sungho Park, Seung Ho Hwang: A 32nm high-k metal gate application processor with GHz multi-core CPU. ISSCC 2012: 214-216 | |
| 2005 | ||
| c2 | Dinesh Patil, Sunghee Yun, Seung-Jean Kim, Alvin Cheung, Mark Horowitz, Stephen P. Boyd: A New Method for Design of Robust Digital Circuits. ISQED 2005: 676-681 | |
| 2001 | ||
| c1 | Stephen P. Boyd, Lieven Vandenberghe, Abbas El Gamal, Sunghee Yun: Design of robust global power and ground networks. ISPD 2001: 60-65 | |
Colors in the list of coauthors
Last update Sun May 19 07:42:52 2013 CET by the DBLP Team —
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