| 2013 | ||
|---|---|---|
| j7 | Qianming Yang, Mei Wen, Nan Wu, Chunyuan Zhang: Accelerating thread-intensive and explicit memory management programs with dynamic partial reconfiguration. The Journal of Supercomputing 63(2): 508-537 (2013) | |
| c40 | Wentao Jia, Rui Li, Chunyuan Zhang: An Adaptive Low-Overhead Mechanism for Dependable General-Purpose Many-Core Processors. ICT-EurAsia 2013: 337-342 | |
| 2012 | ||
| j6 | Hong-Lin Zhang, Chunyuan Zhang, Dong Liu: Identification method of independent module for dynamic fault tree with interdependent basic events and repeated events. IJCAT 43(2): 168-178 (2012) | |
| c39 | Mei Wen, Huayou Su, Wenjie Wei, Nan Wu, Xing Cai, Chunyuan Zhang: Using 1000+ GPUs and 10000+ CPUs for Sedimentary Basin Simulations. CLUSTER 2012: 27-35 | |
| c38 | Mei Wen, Nan Wu, Qianming Yang, Chunyuan Zhang, Liang Zhao: The masala machine: accelerating thread-intensive and explicit memory management programs with dynamically reconfigurable FPGAs (abstract only). FPGA 2012: 265 | |
| c37 | Changqing Xun, Mei Wen, Nan Wu, Chunyuan Zhang, Hayden Kwok-Hay So: Extending BORPH for shared memory reconfigurable computers. FPL 2012: 563-566 | |
| c36 | Yi He, Maolin Guan, Chunyuan Zhang, Tian Tian, Qianming Yang: Fully Distributed On-chip Instruction Memory Design for Stream Architecture Based on Field-Divided VLIW Compression. HPCC-ICESS 2012: 25-32 | |
| c35 | ||
| c34 | Nan Wu, Mei Wen, Huayou Su, Ju Ren, Chunyuan Zhang: A Parallel H.264 Encoder with CUDA: Mapping and Evaluation. ICPADS 2012: 276-283 | |
| 2011 | ||
| j5 | Nan Wu, Qianming Yang, Mei Wen, Yi He, Ju Ren, Maolin Guan, Chunyuan Zhang: Tiled Multi-Core Stream Architecture. T. HiPEAC 4: 274-293 (2011) | |
| c33 | ||
| c32 | ||
| 2010 | ||
| c31 | ||
| c30 | ||
| c29 | ||
| c28 | Hong-Lin Zhang, Chunyuan Zhang, Dong Liu, Gui-Wu Xie: Importance Measure Method for Dynamic Fault Tree Based on Isomorphic Node. ICICA (LNCS) 2010: 9-16 | |
| 2009 | ||
| j4 | Li Li, Chunyuan Zhang: Optimal Channel Width Adaptation, Logical Topology Design, and Routing in Wireless Mesh Networks. EURASIP J. Wireless Comm. and Networking 2009 (2009) | |
| c27 | ||
| c26 | ||
| c25 | Nan Wu, Mei Wen, Wei Wu, Ju Ren, Huayou Su, Changqing Xun, Chunyuan Zhang: Streaming HD H.264 encoder on programmable processors. ACM Multimedia 2009: 371-380 | |
| c24 | Li Li, Bin Qin, Chunyuan Zhang: Interference-aware Broadcast Routing and Channel Assignment for Multi-Radio Wireless Mesh Networks. VTC Fall 2009: 0- | |
| c23 | ||
| 2008 | ||
| j3 | Mei Wen, Nan Wu, Chunyuan Zhang, Qianming Yang, Ju Ren, Yi He, Wei Wu, Jun Chai, Maolin Guan, Changqing Xun: On-Chip Memory System Optimization Design for the FT64 Scientific Stream Accelerator. IEEE Micro 28(4): 51-70 (2008) | |
| j2 | Haiyan Li, Chunyuan Zhang, Li Li, Ju Ren: Transform coding on programmable stream processors. The Journal of Supercomputing 45(1): 66-87 (2008) | |
| c22 | Mei Wen, Nan Wu, Maolin Guan, Chunyuan Zhang: Load scheduling: Reducing pressure on distributed register files for free. ASP-DAC 2008: 340-345 | |
| c21 | Yi Fang, Chunyuan Zhang: Improving the Quality of Graduate Education by Association Rules Analysis. FSKD (4) 2008: 570-573 | |
| 2007 | ||
| c20 | Nan Wu, Qianming Yang, Mei Wen, Yi He, Changqing Xun, Chunyuan Zhang: A Stream System-on-Chip Architecture for High Speed Target Recognition Based on Biologic Vision. Asia-Pacific Computer Systems Architecture Conference 2007: 256-267 | |
| c19 | Mei Wen, Nan Wu, Chunyuan Zhang, Wei Wu, Qianming Yang, Changqing Xun: FT64: Scientific Computing with Streams. HiPC 2007: 209-220 | |
| c18 | ||
| c17 | Dong Liu, Chunyuan Zhang, Weiyan Xing, Rui Li, Haiyan Li: Quantification of Cut Sequence Set for Fault Tree Analysis. HPCC 2007: 755-765 | |
| c16 | Dong Liu, Weiyan Xing, Rui Li, Chunyuan Zhang, Haiyan Li: A Fault-Tolerant Real-Time Scheduling Algorithm in Software Fault-Tolerant Module. International Conference on Computational Science (4) 2007: 961-964 | |
| c15 | Dong Liu, Weiyan Xing, Chunyuan Zhang, Rui Li, Haiyan Li: Cut Sequence Set Generation for Fault Tree Analysis. ICESS 2007: 592-603 | |
| c14 | ||
| c13 | ||
| 2006 | ||
| c12 | Mei Wen, Nan Wu, Changqing Xun, Wei Wu, Chunyuan Zhang: Analysis and Performance Results of a fluid dynamics Application on MASA Stream Processor. ACIS-ICIS 2006: 350-354 | |
| c11 | Mei Wen, Nan Wu, Changqing Xun, Wei Wu, Chunyuan Zhang: Optimization and Evaluating of StreamYGX2 on MASA Stream Processor. Asia-Pacific Computer Systems Architecture Conference 2006: 531-537 | |
| c10 | Nan Wu, Mei Wen, Ju Ren, Yi He, Chunyuan Zhang: Register Allocation on Stream Processor with Local Register File. Asia-Pacific Computer Systems Architecture Conference 2006: 545-551 | |
| c9 | ||
| c8 | Dong Liu, Chunyuan Zhang, Rui Li: The Process of Synchronization in Dual Redundant Fault-Tolerant System. Intelligent Information Processing 2006: 493-498 | |
| c7 | Dong Liu, Chunyuan Zhang, Rui Li: Prediction-Table Based Fault-Tolerant Real-Time Scheduling Algorithm. PDCAT 2006: 144-149 | |
| 2005 | ||
| j1 | Mei Wen, Nan Wu, Haiyan Li, Chunyuan Zhang: Multiple-Morphs Adaptive Stream Architecture. J. Comput. Sci. Technol. 20(5): 635-646 (2005) | |
| c6 | Nan Wu, Mei Wen, Haiyan Li, Li Li, Chunyuan Zhang: A Stream Architecture Supporting Multiple Stream Execution Models. Asia-Pacific Computer Systems Architecture Conference 2005: 143-156 | |
| c5 | Haiyan Li, Mei Wen, Chunyuan Zhang, Nan Wu, Li Li, Changqing Xun: Accelerated Motion Estimation of H.264 on Imagine Stream Processor. ICIAR 2005: 367-374 | |
| 2004 | ||
| c4 | Mei Wen, Nan Wu, Haiyan Li, Chunyuan Zhang: Multiple-Dimension Scalable Adaptive Stream Architecture. Asia-Pacific Computer Systems Architecture Conference 2004: 199-211 | |
| c3 | ||
| c2 | Jianzhuang Lu, Chunyuan Zhang, Zhiying Wang, Yun Cheng, Dan Wu: A Case of SCMP with TLS. ISPA 2004: 975-984 | |
| 1997 | ||
| c1 | Yang Shi, Chenxi Zhang, Chunyuan Zhang: The study of parallel simulation processing based on MPP technology. APDC 1997: 34-41 | |
Colors in the list of coauthors
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