Please note: This is a beta version of the new dblp website.
You can find the classic dblp view of this page here.
You can find the classic dblp view of this page here.
Xinmiao Zhang
2010 – today
- 2013
[j21]Xinmiao Zhang: An Efficient Interpolation-Based Chase BCH Decoder. IEEE Trans. on Circuits and Systems 60-II(4): 212-216 (2013)- [j20]Xinmiao Zhang, Yu Zheng: Generalized Backward Interpolation for Algebraic Soft-Decision Decoding of Reed-Solomon Codes. IEEE Transactions on Communications 61(1): 13-23 (2013)
- [c25]Xinmiao Zhang, Richard Shi, James A. Ritcey: Reducing the latency of Lee-O'Sullivan interpolation through modified initialization. ITA 2013: 1-5
- 2012
- [j19]Xinmiao Zhang, Jiangli Zhu, Wei Zhang: Efficient Reencoder Architectures for Algebraic Soft-Decision Reed-Solomon Decoding. IEEE Trans. on Circuits and Systems 59-II(3): 163-167 (2012)
- [j18]Xinmiao Zhang, Yu Zheng: Systematically Re-encoded Algebraic Soft-Decision Reed-Solomon Decoder. IEEE Trans. on Circuits and Systems 59-II(6): 376-380 (2012)
- [j17]Xinmiao Zhang, Zhongfeng Wang: A Low-Complexity Three-Error-Correcting BCH Decoder for Optical Transport Network. IEEE Trans. on Circuits and Systems 59-II(10): 663-667 (2012)
- [j16]Xinmiao Zhang, Yingquan Wu, Jiangli Zhu, Yu Zheng: Novel Interpolation and Polynomial Selection for Low-Complexity Chase Soft-Decision Reed-Solomon Decoding. IEEE Trans. VLSI Syst. 20(7): 1318-1322 (2012)
- [j15]Xinmiao Zhang, Fang Cai, Shu Lin: Low-Complexity Reliability-Based Message-Passing Decoder Architectures for Non-Binary LDPC Codes. IEEE Trans. VLSI Syst. 20(11): 1938-1950 (2012)
- [j14]Xinmiao Zhang, Jiangli Zhu, Wei Zhang: Modified Low-Complexity Chase Soft-Decision Decoder of Reed-Solomon Codes. Signal Processing Systems 66(1): 3-13 (2012)
- [j13]Jiangli Zhu, Xinmiao Zhang: Efficient Generalized Minimum-distance Decoders of Reed-Solomon Codes. Signal Processing Systems 66(3): 245-257 (2012)
- [c24]Wei Zhang, Xinmiao Zhang, Hao Wang: Increasing the energy efficiency of WSNs using algebraic soft-decision reed-solomon decoders. APCCAS 2012: 49-52
- [c23]Xinmiao Zhang, Jea Hack Lee, Myung Hoon Sunwoo: Phase recovery for QPSK transmission without using complex multipliers. ICUIMC 2012: 125
- [c22]Xinmiao Zhang, Fang Cai, Richard Shi: Low-power LDPC decoding based on iteration prediction. ISCAS 2012: 3041-3044
- [c21]Xinmiao Zhang, Richard Shi, James A. Ritcey: On the implementation of modified fuzzy vault for biometric encryption. ITA 2012: 56-61
- [c20]
- [i1]Zhiqiang Cui, Zhongfeng Wang, Xinmiao Zhang: Reduced-Complexity Column-Layered Decoding and Implementation for LDPC Codes. CoRR abs/1204.2577 (2012)
- 2011
- [j12]Somnath Paul, Fang Cai, Xinmiao Zhang, Swarup Bhunia: Reliability-Driven ECC Allocation for Multiple Bit Error Resilience in Processor Cache. IEEE Trans. Computers 60(1): 20-34 (2011)
- [j11]Xinmiao Zhang, Fang Cai: Efficient Partial-Parallel Decoder Architecture for Quasi-Cyclic Nonbinary LDPC Codes. IEEE Trans. on Circuits and Systems 58-I(2): 402-414 (2011)
- [j10]Xinmiao Zhang, Fang Cai: Reduced-Complexity Decoder Architecture for Non-Binary LDPC Codes. IEEE Trans. VLSI Syst. 19(7): 1229-1238 (2011)
- [c19]Xinmiao Zhang, Fang Cai: Low-complexity architectures for reliability-based message-passing non-binary LDPC decoding. ISCAS 2011: 1303-1306
- [c18]Xinmiao Zhang, Yingquan Wu, Jiangli Zhu: A novel polynomial selection scheme for low-complexity chase algebraic soft-decision reed-solomon decoding. ISCAS 2011: 2689-2692
- [c17]
- 2010
- [j9]Xinmiao Zhang, Jiangli Zhu: High-Throughput Interpolation Architecture for Algebraic Soft-Decision Reed-Solomon Decoding. IEEE Trans. on Circuits and Systems 57-I(3): 581-591 (2010)
- [j8]Xinmiao Zhang, Jiangli Zhu: Algebraic Soft-Decision Decoder Architectures for Long Reed-Solomon Codes. IEEE Trans. on Circuits and Systems 57-II(10): 787-792 (2010)
- [c16]Jiangli Zhu, Xinmiao Zhang: Efficient architecture for generalized minimum-distance decoder of Reed-Solomon codes. ICASSP 2010: 1502-1505
- [c15]Xinmiao Zhang, Fang Cai: Partial-parallel decoder architecture for quasi-cyclic non-binary LDPC codes. ICASSP 2010: 1506-1509
- [c14]Yang Chen, Xinmiao Zhang: High-speed architecture for image reconstruction based on compressive sensing. ICASSP 2010: 1574-1577
- [c13]Jiangli Zhu, Xinmiao Zhang: High-speed re-encoder design for algebraic soft-decision Reed-Solomon decoding. ISCAS 2010: 465-468
- [c12]Xinmiao Zhang, Jiangli Zhu: Hardware complexities of algebraic soft-decision Reed-Solomon decoders and comparisons. ITA 2010: 558-567
2000 – 2009
- 2009
- [j7]Jiangli Zhu, Xinmiao Zhang, Zhongfeng Wang: Backward Interpolation Architecture for Algebraic Soft-Decision Reed-Solomon Decoding. IEEE Trans. VLSI Syst. 17(11): 1602-1615 (2009)
- [c11]Jiangli Zhu, Xinmiao Zhang: Factorization-free Low-complexity Chase Soft-decision Decoding of Reed-Solomon Codes. ISCAS 2009: 2677-2680
- 2008
- [j6]Jiangli Zhu, Xinmiao Zhang: Efficient VLSI Architecture for Soft-Decision Decoding of Reed-Solomon Codes. IEEE Trans. on Circuits and Systems 55-I(10): 3050-3062 (2008)
- [c10]Jiangli Zhu, Xinmiao Zhang, Zhongfeng Wang: Combined interpolation architecture for soft-decision decoding of Reed-Solomon codes. ICCD 2008: 526-531
- [c9]Bainan Chen, Xinmiao Zhang: FPGA implementation of a factorization processor for soft-decision reed-solomon decoding. ISCAS 2008: 944-947
- [c8]Jiangli Zhu, Xinmiao Zhang, Zhongfeng Wang: Novel interpolation architecture for Low-Complexity Chase soft-decision decoding of Reed-Solomon codes. ISCAS 2008: 3078-3081
- [c7]Xinmiao Zhang, Jiangli Zhu: Efficient interpolration architecture for soft-decision Reed-Solomon decoding by applying slow-down. SiPS 2008: 19-24
- [c6]Bainan Chen, Xinmiao Zhang, Zhongfeng Wang: Error correction for multi-level NAND flash memory using Reed-Solomon codes. SiPS 2008: 94-99
- 2007
- [j5]Nicolas Sklavos, Máire McLoone, Xinmiao Zhang: MONET Special Issue on Next Generation Hardware Architectures for Secure Mobile Computing. MONET 12(4): 229-230 (2007)
- [j4]Xinmiao Zhang: Further Exploring the Strength of Prediction in the Factorization of Soft-Decision Reed-Solomon Decoding. IEEE Trans. VLSI Syst. 15(7): 811-820 (2007)
- [c5]Xinmiao Zhang, Jiangli Zhu: Low-complexity Interpolation Architecture for Soft-decision Reed-Solomon Decoding. ISCAS 2007: 1413-1416
- [c4]Jiangli Zhu, Xinmiao Zhang: Efficient Interpolation Architecture for Soft-Decision Reed-Solomon Decoding. SiPS 2007: 663-668
- 2006
- [c3]Xinmiao Zhang: Partial parallel factorization in soft-decision Reed-Solomon decoding. ACM Great Lakes Symposium on VLSI 2006: 272-277
- [c2]Xinmiao Zhang: High-speed Factorization Architecture for Soft-decision Reed-Solomon Decoding. ICCD 2006
- 2005
- [j3]Xinmiao Zhang, Keshab K. Parhi: Fast factorization architecture in soft-decision Reed-Solomon decoding. IEEE Trans. VLSI Syst. 13(4): 413-426 (2005)
- [j2]Xinmiao Zhang, Keshab K. Parhi: High-Speed Architectures for Parallel Long BCH Encoders. IEEE Trans. VLSI Syst. 13(7): 872-877 (2005)
- 2004
- [j1]Xinmiao Zhang, Keshab K. Parhi: High-speed VLSI architectures for the AES algorithm. IEEE Trans. VLSI Syst. 12(9): 957-967 (2004)
- [c1]Xinmiao Zhang, Keshab K. Parhi: High-speed architectures for parallel long BCH encoders. ACM Great Lakes Symposium on VLSI 2004: 1-6
Coauthor Index
data released under the ODC-BY 1.0 license. See also our legal information page
last updated on 2013-04-26 21:29 CEST by the dblp team