Bin Zhang

University of Texas at Austin

other persons with the same name:

• Bin Zhang
• Bin Zhang 0001 - Northeastern University
• Bin Zhang 0002 - Merck Research Labs, Departments of Human Genetics and Biostatistics, UCLA
• Bin Zhang 0003 - State Key Laboratory of Information Security, Institute of Software, Chinese Academy of Sciences / University of Luxembourg
• Bin Zhang 0004 - HP Labs Palo Alto
• Bin Zhang 0005 - Arkansas State University
• Bin Zhang 0006 - Lingnan College, Sun Yat-sen University / University of Science and Technology of China
• Bin Zhang 0007 - De Paul University
• Bin Zhang 0008 - Impact Technologies / Georgia Insititute of Technology / Nanyang Technological University
• Bin Zhang 0009 - University of Washington, Seattle, USA
• Bin Zhang 0010 - University of Southern California
• Bin Zhang 0012 - East China University of Science and Technology
• Bin Zhang 0013 - IBM China Research Lab.
• Bin Zhang 0014 - Carnegie Mellon University / Lousiana State University
• Bin Zhang 0015 - Information Engineering University of PLA
• Bin Zhang 0016 - Network Research Center of Tsinghua University
• Bin Zhang 0017 - Harvard University
• Bin Zhang 0018 - Institut für Nachrichtentechnik, RWTH Aachen, Germany

	2009
c6		Bin Zhang: Online circuit reliability monitoring. ACM Great Lakes Symposium on VLSI 2009: 221-226
	2008
c5		Bin Zhang, Michael Orshansky: Modeling of NBTI-Induced PMOS Degradation under Arbitrary Dynamic Temperature Variation. ISQED 2008: 774-779
	2007
j1		Kypros Constantinides, Stephen Plaza, Jason A. Blome, Valeria Bertacco, Scott A. Mahlke, Todd M. Austin, Bin Zhang, Michael Orshansky: Architecting a reliable CMP switch architecture. TACO 4(1) (2007)
	2006
c4		Kypros Constantinides, Stephen Plaza, Jason A. Blome, Bin Zhang, Valeria Bertacco, Scott A. Mahlke, Todd M. Austin, Michael Orshansky: BulletProof: a defect-tolerant CMP switch architecture. HPCA 2006: 5-16
c3		Bin Zhang, Ari Arapostathis, Sani R. Nassif, Michael Orshansky: Analytical modeling of SRAM dynamic stability. ICCAD 2006: 315-322
c2		Bin Zhang, Wei-Shen Wang, Michael Orshansky: FASER: Fast Analysis of Soft Error Susceptibility for Cell-Based Designs. ISQED 2006: 755-760
	2005
c1		Anand Ramalingam, Bin Zhang, Anirudh Devgan, David Z. Pan: Sleep transistor sizing using timing criticality and temporal currents. ASP-DAC 2005: 1094-1097

Coauthor Index

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