| 2011 | ||
|---|---|---|
| c4 | Xianghu Ji, Chuang Zhu, Huizhu Jia, Xiaodong Xie, Hai Bing Yin: A hardware-efficient architecture for multi-resolution motion estimation using fully reconfigurable processing element array. ICME 2011: 1-6 | |
| c3 | Chuang Zhu, Yuan Li, Huizhu Jia, Xiaodong Xie, Hai Bing Yin: A highly efficient pipeline architecture of RDO-based mode decision design for AVS HD video encoder. ICME 2011: 1-6 | |
| c2 | Hai Bing Yin, Bingqian Zhou, Chuang Zhu, Huizhu Jia: Adaptive integer-precision Lagrange multiplier selection for high performance AVS video coding. VCIP 2011: 1-4 | |
| 2010 | ||
| j1 | Hai Bing Yin, Honggang Qi, Huizhu Jia, Chuang Zhu, Xiaodong Xie: Algorithm analysis and architecture design for rate distortion optimized mode decision in high definition AVS video encoder. Sig. Proc.: Image Comm. 25(9): 633-647 (2010) | |
| c1 | Xiaohan Wang, Chuang Zhu, Hai Bing Yin, Wen Gao, Xiaodong Xie, Huizhu Jia: Fast Mode Decision Based on RDO for AVS High Definition Video Encoder. PCM (2) 2010: 62-72 | |
| 1 | Wen Gao | |
| 2 | Xianghu Ji | |
| 3 | Huizhu Jia | |
| 4 | Yuan Li | |
| 5 | Honggang Qi | |
| 6 | Xiaohan Wang | |
| 7 | Xiaodong Xie | |
| 8 | Hai Bing Yin | |
| 9 | Bingqian Zhou |
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