Please note: This is a beta version of the new dblp website.
You can find the classic dblp view of this page here.
You can find the classic dblp view of this page here.
Vojin Zivojnovic
1990 – 1999
- 1999
[c6]Stefan Pees, Andreas Hoffmann, Vojin Zivojnovic, Heinrich Meyr: LISA - Machine Description Language for Cycle-Accurate Models of Programmable DSP Architectures. DAC 1999: 933-938- [c5]Lisa M. Guerra, Joachim Fitzner, Dipankar Talukdar, Chris Schläger, Bassam Tabbara, Vojin Zivojnovic: Cycle and Phase Accurate DSP Modeling and Integration for HW/SW Co-Verification. DAC 1999: 964-969
- 1998
- [j3]Vojin Zivojnovic: Minimum Fisher information of moment-constrained distributions with application to robust blind identification. Signal Processing 65(2): 297-313 (1998)
- 1997
- [j2]Vojin Zivojnovic, Steven W. K. Tjiang, Heinrich Meyr: Compiled Simulation of Programmable DSP Architectures. VLSI Signal Processing 16(1): 73-80 (1997)
- [c4]Stefan Pees, Martin Vaupel, Vojin Zivojnovic, Heinrich Meyr: On core and more: a design perspective for systems-on-a-chip. ASAP 1997: 448-457
- 1996
- [c3]
- [c2]Vojin Zivojnovic, Stefan Pees, C. Schälger, Markus Willems, R. Schoenen, Heinrich Meyr: DSP Processor/Compiler Co-Design: A Quantitative Approach. ISSS 1996: 108-
- 1993
- [j1]Sebastian Ritz, Matthias Pankert, Vojin Zivojnovic, Heinrich Meyr: High-Level Software Synthesis for the Design of Communication Systems. IEEE Journal on Selected Areas in Communications 11(3): 348-358 (1993)
- [c1]Vojin Zivojnovic, Heinrich Meyr: Design of optimum interpolation filters for digital demodulators. ISCAS 1993: 140-143
Coauthor Index
data released under the ODC-BY 1.0 license. See also our legal information page
last updated on 2012-12-02 20:50 CET by the dblp team