Christian G. Zoellin

Rafal Baranowski, Stefano Di Carlo, Nadereh Hatami, Michael E. Imhof, Michael A. Kochte, Paolo Prinetto, Hans-Joachim Wunderlich, Christian G. Zoellin: Efficient multi-level fault simulation of HW/SW systems for structural faults. SCIENCE CHINA Information Sciences 54(9): 1784-1796 (2011)

Michael A. Kochte, Christian G. Zoellin, Hans-Joachim Wunderlich: Efficient Concurrent Self-Test with Partially Specified Patterns. J. Electronic Testing 26(5): 581-594 (2010)

Michael A. Kochte, Christian G. Zoellin, Rafal Baranowski, Michael E. Imhof, Hans-Joachim Wunderlich, Nadereh Hatami, Stefano Di Carlo, Paolo Prinetto: Efficient Simulation of Structural Faults for the Reliability Evaluation at System-Level. Asian Test Symposium 2010: 3-8

Michael A. Kochte, Marcel Schaal, Hans-Joachim Wunderlich, Christian G. Zoellin: Efficient fault simulation on many-core processors. DAC 2010: 380-385

Michael A. Kochte, Christian G. Zoellin, Rafal Baranowski, Michael E. Imhof, Hans-Joachim Wunderlich, Nadereh Hatami, Stefano Di Carlo, Paolo Prinetto: System reliability evaluation using concurrent multi-level simulation of structural faults. ITC 2010: 817

Christian G. Zoellin, Hans-Joachim Wunderlich: Low-power test planning for arbitrary at-speed delay-test clock schemes. VTS 2010: 93-98

Michael A. Kochte, Christian G. Zoellin, Michael E. Imhof, Rauf Salimi Khaligh, Martin Radetzki, Hans-Joachim Wunderlich, Stefano Di Carlo, Paolo Prinetto: Test exploration and validation using transaction level models. DATE 2009: 1250-1253

Michael A. Kochte, Christian G. Zoellin, Hans-Joachim Wunderlich: Concurrent Self-Test with Partially Specified Patterns for Low Test Latency and Overhead. European Test Symposium 2009: 53-58

Melanie Elm, Hans-Joachim Wunderlich, Michael E. Imhof, Christian G. Zoellin, Jens Leenstra, Nicolas Mäding: Scan chain clustering for test power reduction. DAC 2008: 828-833

Michael A. Kochte, Christian G. Zoellin, Michael E. Imhof, Hans-Joachim Wunderlich: Test Set Stripping Limiting the Maximum Number of Specified Bits. DELTA 2008: 581-586

Christian G. Zoellin, Hans-Joachim Wunderlich, Ilia Polian, Bernd Becker: Selective Hardening in Early Design Steps. European Test Symposium 2008: 185-190

Michael E. Imhof, Hans-Joachim Wunderlich, Christian G. Zoellin: Integrating Scan Design and Soft Error Correction in Low-Power Applications. IOLTS 2008: 59-64

Michael E. Imhof, Christian G. Zoellin, Hans-Joachim Wunderlich, Nicolas Mäding, Jens Leenstra: Scan Test Planning for Power Reduction. DAC 2007: 521-526

Sybille Hellebrand, Christian G. Zoellin, Hans-Joachim Wunderlich, Stefan Ludwig, Torsten Coym, Bernd Straube: A Refined Electrical Model for Particle Strikes and its Impact on SEU Prediction. DFT 2007: 50-58

Abdul Wahid Hakmi, Hans-Joachim Wunderlich, Christian G. Zoellin, Andreas Glowatz, Friedrich Hapke, Jürgen Schlöffel, Laurent Souef: Programmable deterministic Built-In Self-Test. ITC 2007: 1-9

Christian G. Zoellin, Hans-Joachim Wunderlich, Nicolas Mäding, Jens Leenstra: BIST Power Reduction Using Scan-Chain Disable in the Cell Processor. ITC 2006: 1-8

Arthur A. Bright, Ruud A. Haring, Marc Boris Dombrowa, Martin Ohmacht, Dirk Hoenicke, Sarabjeet Singh, James A. Marcella, Robert F. Lembach, Steve M. Douskey, Matthew R. Ellavsky, Christian G. Zoellin, Alan Gara: Blue Gene/L compute chip: Synthesis, timing, and physical design. IBM Journal of Research and Development 49(2-3): 277-288 (2005)